Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8362085 |
1 |
|
|
T22 |
1308 |
|
T23 |
67119 |
|
T24 |
1 |
| auto[1] |
6280807 |
1 |
|
|
T23 |
50977 |
|
T25 |
199879 |
|
T1 |
38560 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12127818 |
1 |
|
|
T22 |
1308 |
|
T23 |
97980 |
|
T24 |
1 |
| auto[1] |
2515074 |
1 |
|
|
T23 |
20116 |
|
T25 |
76826 |
|
T1 |
15005 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8390919 |
1 |
|
|
T22 |
1308 |
|
T23 |
67001 |
|
T24 |
1 |
| auto[1] |
6251973 |
1 |
|
|
T23 |
51095 |
|
T25 |
200531 |
|
T1 |
39149 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1872088 |
1 |
|
|
T23 |
16050 |
|
T25 |
62194 |
|
T1 |
12468 |
| auto[1] |
auto[0] |
auto[1] |
1259877 |
1 |
|
|
T23 |
10136 |
|
T25 |
38848 |
|
T1 |
7732 |
| auto[1] |
auto[1] |
auto[0] |
1864811 |
1 |
|
|
T23 |
14929 |
|
T25 |
61511 |
|
T1 |
11676 |
| auto[1] |
auto[1] |
auto[1] |
1255197 |
1 |
|
|
T23 |
9980 |
|
T25 |
37978 |
|
T1 |
7273 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |