Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8365152 |
1 |
|
|
T22 |
1308 |
|
T23 |
64168 |
|
T24 |
1 |
| auto[1] |
6277740 |
1 |
|
|
T23 |
53928 |
|
T25 |
200401 |
|
T1 |
39718 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12116307 |
1 |
|
|
T22 |
1308 |
|
T23 |
97374 |
|
T24 |
1 |
| auto[1] |
2526585 |
1 |
|
|
T23 |
20722 |
|
T25 |
78567 |
|
T1 |
15050 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8331501 |
1 |
|
|
T22 |
1308 |
|
T23 |
66107 |
|
T24 |
1 |
| auto[1] |
6311391 |
1 |
|
|
T23 |
51989 |
|
T25 |
206189 |
|
T1 |
39644 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1897678 |
1 |
|
|
T23 |
15099 |
|
T25 |
63864 |
|
T1 |
12435 |
| auto[1] |
auto[0] |
auto[1] |
1262694 |
1 |
|
|
T23 |
10021 |
|
T25 |
39036 |
|
T1 |
7790 |
| auto[1] |
auto[1] |
auto[0] |
1887128 |
1 |
|
|
T23 |
16168 |
|
T25 |
63758 |
|
T1 |
12159 |
| auto[1] |
auto[1] |
auto[1] |
1263891 |
1 |
|
|
T23 |
10701 |
|
T25 |
39531 |
|
T1 |
7260 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |