Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8378704 |
1 |
|
|
T22 |
1308 |
|
T23 |
64616 |
|
T24 |
1 |
| auto[1] |
6264188 |
1 |
|
|
T23 |
53480 |
|
T25 |
198765 |
|
T1 |
38498 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13846691 |
1 |
|
|
T22 |
1308 |
|
T23 |
111136 |
|
T24 |
1 |
| auto[1] |
796201 |
1 |
|
|
T23 |
6960 |
|
T25 |
26362 |
|
T1 |
5547 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8363169 |
1 |
|
|
T22 |
1308 |
|
T23 |
65913 |
|
T24 |
1 |
| auto[1] |
6279723 |
1 |
|
|
T23 |
52183 |
|
T25 |
200115 |
|
T1 |
42244 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2759729 |
1 |
|
|
T23 |
21156 |
|
T25 |
89400 |
|
T1 |
19899 |
| auto[1] |
auto[0] |
auto[1] |
401682 |
1 |
|
|
T23 |
3228 |
|
T25 |
13732 |
|
T1 |
3101 |
| auto[1] |
auto[1] |
auto[0] |
2723793 |
1 |
|
|
T23 |
24067 |
|
T25 |
84353 |
|
T1 |
16798 |
| auto[1] |
auto[1] |
auto[1] |
394519 |
1 |
|
|
T23 |
3732 |
|
T25 |
12630 |
|
T1 |
2446 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |