Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8394445 |
1 |
|
|
T22 |
1308 |
|
T23 |
64465 |
|
T24 |
1 |
| auto[1] |
6248447 |
1 |
|
|
T23 |
53631 |
|
T25 |
201980 |
|
T1 |
41105 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13847357 |
1 |
|
|
T22 |
1308 |
|
T23 |
111463 |
|
T24 |
1 |
| auto[1] |
795535 |
1 |
|
|
T23 |
6633 |
|
T25 |
26567 |
|
T1 |
5037 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8374045 |
1 |
|
|
T22 |
1308 |
|
T23 |
68187 |
|
T24 |
1 |
| auto[1] |
6268847 |
1 |
|
|
T23 |
49909 |
|
T25 |
202013 |
|
T1 |
38880 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2752215 |
1 |
|
|
T23 |
21645 |
|
T25 |
87780 |
|
T1 |
16904 |
| auto[1] |
auto[0] |
auto[1] |
401299 |
1 |
|
|
T23 |
3311 |
|
T25 |
13441 |
|
T1 |
2540 |
| auto[1] |
auto[1] |
auto[0] |
2721097 |
1 |
|
|
T23 |
21631 |
|
T25 |
87666 |
|
T1 |
16939 |
| auto[1] |
auto[1] |
auto[1] |
394236 |
1 |
|
|
T23 |
3322 |
|
T25 |
13126 |
|
T1 |
2497 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |