Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8345232 |
1 |
|
|
T22 |
1308 |
|
T23 |
66131 |
|
T24 |
1 |
| auto[1] |
6297660 |
1 |
|
|
T23 |
51965 |
|
T25 |
202796 |
|
T1 |
42430 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13851204 |
1 |
|
|
T22 |
1308 |
|
T23 |
110814 |
|
T24 |
1 |
| auto[1] |
791688 |
1 |
|
|
T23 |
7282 |
|
T25 |
26546 |
|
T1 |
5647 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8393375 |
1 |
|
|
T22 |
1308 |
|
T23 |
64341 |
|
T24 |
1 |
| auto[1] |
6249517 |
1 |
|
|
T23 |
53755 |
|
T25 |
201824 |
|
T1 |
42070 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2725338 |
1 |
|
|
T23 |
23250 |
|
T25 |
86397 |
|
T1 |
16378 |
| auto[1] |
auto[0] |
auto[1] |
394018 |
1 |
|
|
T23 |
3706 |
|
T25 |
13129 |
|
T1 |
2456 |
| auto[1] |
auto[1] |
auto[0] |
2732491 |
1 |
|
|
T23 |
23223 |
|
T25 |
88881 |
|
T1 |
20045 |
| auto[1] |
auto[1] |
auto[1] |
397670 |
1 |
|
|
T23 |
3576 |
|
T25 |
13417 |
|
T1 |
3191 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |