Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7884105 |
1 |
|
|
T25 |
1 |
|
T1 |
53920 |
|
T11 |
290 |
| auto[1] |
5746619 |
1 |
|
|
T1 |
41815 |
|
T13 |
263 |
|
T16 |
28669 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11253494 |
1 |
|
|
T25 |
1 |
|
T1 |
69917 |
|
T11 |
290 |
| auto[1] |
2377230 |
1 |
|
|
T1 |
25818 |
|
T13 |
258 |
|
T16 |
17652 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7912445 |
1 |
|
|
T25 |
1 |
|
T1 |
54585 |
|
T11 |
290 |
| auto[1] |
5718279 |
1 |
|
|
T1 |
41150 |
|
T13 |
285 |
|
T16 |
28183 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1671184 |
1 |
|
|
T1 |
7801 |
|
T13 |
12 |
|
T16 |
4677 |
| auto[1] |
auto[0] |
auto[1] |
1190287 |
1 |
|
|
T1 |
12767 |
|
T13 |
158 |
|
T16 |
7823 |
| auto[1] |
auto[1] |
auto[0] |
1669865 |
1 |
|
|
T1 |
7531 |
|
T13 |
15 |
|
T16 |
5854 |
| auto[1] |
auto[1] |
auto[1] |
1186943 |
1 |
|
|
T1 |
13051 |
|
T13 |
100 |
|
T16 |
9829 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |