Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7873821 |
1 |
|
|
T25 |
1 |
|
T1 |
53815 |
|
T11 |
290 |
| auto[1] |
5756903 |
1 |
|
|
T1 |
41920 |
|
T13 |
270 |
|
T16 |
27868 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11246036 |
1 |
|
|
T25 |
1 |
|
T1 |
70218 |
|
T11 |
290 |
| auto[1] |
2384688 |
1 |
|
|
T1 |
25517 |
|
T13 |
84 |
|
T16 |
16758 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7882783 |
1 |
|
|
T25 |
1 |
|
T1 |
55578 |
|
T11 |
290 |
| auto[1] |
5747941 |
1 |
|
|
T1 |
40157 |
|
T13 |
118 |
|
T16 |
27186 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1684876 |
1 |
|
|
T1 |
7386 |
|
T13 |
13 |
|
T16 |
5248 |
| auto[1] |
auto[0] |
auto[1] |
1193713 |
1 |
|
|
T1 |
12342 |
|
T13 |
47 |
|
T16 |
8607 |
| auto[1] |
auto[1] |
auto[0] |
1678377 |
1 |
|
|
T1 |
7254 |
|
T13 |
21 |
|
T16 |
5180 |
| auto[1] |
auto[1] |
auto[1] |
1190975 |
1 |
|
|
T1 |
13175 |
|
T13 |
37 |
|
T16 |
8151 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |