Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7884467 |
1 |
|
|
T25 |
1 |
|
T1 |
55552 |
|
T11 |
290 |
| auto[1] |
5746257 |
1 |
|
|
T1 |
40183 |
|
T13 |
274 |
|
T16 |
28261 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11252237 |
1 |
|
|
T25 |
1 |
|
T1 |
69191 |
|
T11 |
290 |
| auto[1] |
2378487 |
1 |
|
|
T1 |
26544 |
|
T13 |
249 |
|
T16 |
19028 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7907521 |
1 |
|
|
T25 |
1 |
|
T1 |
53858 |
|
T11 |
290 |
| auto[1] |
5723203 |
1 |
|
|
T1 |
41877 |
|
T13 |
354 |
|
T16 |
29862 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1666893 |
1 |
|
|
T1 |
7588 |
|
T13 |
49 |
|
T16 |
5262 |
| auto[1] |
auto[0] |
auto[1] |
1185549 |
1 |
|
|
T1 |
13342 |
|
T13 |
149 |
|
T16 |
9330 |
| auto[1] |
auto[1] |
auto[0] |
1677823 |
1 |
|
|
T1 |
7745 |
|
T13 |
56 |
|
T16 |
5572 |
| auto[1] |
auto[1] |
auto[1] |
1192938 |
1 |
|
|
T1 |
13202 |
|
T13 |
100 |
|
T16 |
9698 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |