Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7898018 |
1 |
|
|
T25 |
1 |
|
T1 |
55329 |
|
T11 |
290 |
| auto[1] |
5732706 |
1 |
|
|
T1 |
40406 |
|
T13 |
253 |
|
T16 |
25223 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11258452 |
1 |
|
|
T25 |
1 |
|
T1 |
67732 |
|
T11 |
290 |
| auto[1] |
2372272 |
1 |
|
|
T1 |
28003 |
|
T13 |
178 |
|
T16 |
16761 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7938997 |
1 |
|
|
T25 |
1 |
|
T1 |
51969 |
|
T11 |
290 |
| auto[1] |
5691727 |
1 |
|
|
T1 |
43766 |
|
T13 |
223 |
|
T16 |
27044 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1655341 |
1 |
|
|
T1 |
7872 |
|
T13 |
27 |
|
T16 |
5513 |
| auto[1] |
auto[0] |
auto[1] |
1188451 |
1 |
|
|
T1 |
13762 |
|
T13 |
109 |
|
T16 |
8835 |
| auto[1] |
auto[1] |
auto[0] |
1664114 |
1 |
|
|
T1 |
7891 |
|
T13 |
18 |
|
T16 |
4770 |
| auto[1] |
auto[1] |
auto[1] |
1183821 |
1 |
|
|
T1 |
14241 |
|
T13 |
69 |
|
T16 |
7926 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |