Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7890312 |
1 |
|
|
T25 |
1 |
|
T1 |
56440 |
|
T11 |
290 |
| auto[1] |
5740412 |
1 |
|
|
T1 |
39295 |
|
T13 |
325 |
|
T16 |
26862 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12903266 |
1 |
|
|
T25 |
1 |
|
T1 |
90957 |
|
T11 |
290 |
| auto[1] |
727458 |
1 |
|
|
T1 |
4778 |
|
T13 |
12 |
|
T16 |
2971 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7917113 |
1 |
|
|
T25 |
1 |
|
T1 |
54657 |
|
T11 |
290 |
| auto[1] |
5713611 |
1 |
|
|
T1 |
41078 |
|
T13 |
382 |
|
T16 |
26570 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2507681 |
1 |
|
|
T1 |
19597 |
|
T13 |
187 |
|
T16 |
12777 |
| auto[1] |
auto[0] |
auto[1] |
366451 |
1 |
|
|
T1 |
2699 |
|
T13 |
6 |
|
T16 |
1661 |
| auto[1] |
auto[1] |
auto[0] |
2478472 |
1 |
|
|
T1 |
16703 |
|
T13 |
183 |
|
T16 |
10822 |
| auto[1] |
auto[1] |
auto[1] |
361007 |
1 |
|
|
T1 |
2079 |
|
T13 |
6 |
|
T16 |
1310 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |