Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7881389 |
1 |
|
|
T25 |
1 |
|
T1 |
55565 |
|
T11 |
290 |
| auto[1] |
5749335 |
1 |
|
|
T1 |
40170 |
|
T13 |
375 |
|
T16 |
27050 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11245952 |
1 |
|
|
T25 |
1 |
|
T1 |
67897 |
|
T11 |
290 |
| auto[1] |
2384772 |
1 |
|
|
T1 |
27838 |
|
T13 |
249 |
|
T16 |
16749 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7890628 |
1 |
|
|
T25 |
1 |
|
T1 |
52148 |
|
T11 |
290 |
| auto[1] |
5740096 |
1 |
|
|
T1 |
43587 |
|
T13 |
295 |
|
T16 |
26411 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1653867 |
1 |
|
|
T1 |
7717 |
|
T13 |
5 |
|
T16 |
4988 |
| auto[1] |
auto[0] |
auto[1] |
1184794 |
1 |
|
|
T1 |
14188 |
|
T13 |
118 |
|
T16 |
8933 |
| auto[1] |
auto[1] |
auto[0] |
1701457 |
1 |
|
|
T1 |
8032 |
|
T13 |
41 |
|
T16 |
4674 |
| auto[1] |
auto[1] |
auto[1] |
1199978 |
1 |
|
|
T1 |
13650 |
|
T13 |
131 |
|
T16 |
7816 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |