Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7900889 |
1 |
|
|
T25 |
1 |
|
T1 |
54056 |
|
T11 |
290 |
| auto[1] |
5729835 |
1 |
|
|
T1 |
41679 |
|
T13 |
259 |
|
T16 |
28213 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12897667 |
1 |
|
|
T25 |
1 |
|
T1 |
90938 |
|
T11 |
290 |
| auto[1] |
733057 |
1 |
|
|
T1 |
4797 |
|
T13 |
14 |
|
T16 |
3202 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7888189 |
1 |
|
|
T25 |
1 |
|
T1 |
54085 |
|
T11 |
290 |
| auto[1] |
5742535 |
1 |
|
|
T1 |
41650 |
|
T13 |
423 |
|
T16 |
28165 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2509556 |
1 |
|
|
T1 |
18080 |
|
T13 |
222 |
|
T16 |
11752 |
| auto[1] |
auto[0] |
auto[1] |
368375 |
1 |
|
|
T1 |
2338 |
|
T13 |
5 |
|
T16 |
1489 |
| auto[1] |
auto[1] |
auto[0] |
2499922 |
1 |
|
|
T1 |
18773 |
|
T13 |
187 |
|
T16 |
13211 |
| auto[1] |
auto[1] |
auto[1] |
364682 |
1 |
|
|
T1 |
2459 |
|
T13 |
9 |
|
T16 |
1713 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |