cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56272 |
1 |
|
|
T104 |
435 |
|
T46 |
785 |
|
T52 |
525 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50199 |
1 |
|
|
T104 |
534 |
|
T46 |
498 |
|
T52 |
1154 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57694 |
1 |
|
|
T104 |
810 |
|
T46 |
699 |
|
T52 |
406 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50732 |
1 |
|
|
T104 |
1468 |
|
T46 |
1499 |
|
T52 |
278 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T104 |
28 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T104 |
29 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T104 |
28 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T104 |
29 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T104 |
27 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T104 |
29 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T104 |
24 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T104 |
24 |
|
T46 |
15 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T104 |
22 |
|
T46 |
15 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T104 |
21 |
|
T46 |
15 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T104 |
26 |
|
T46 |
18 |
|
T52 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T104 |
25 |
|
T46 |
17 |
|
T52 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T104 |
20 |
|
T46 |
13 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T104 |
25 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T104 |
19 |
|
T46 |
12 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T104 |
23 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T104 |
18 |
|
T46 |
12 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T104 |
23 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T104 |
18 |
|
T46 |
12 |
|
T52 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T104 |
22 |
|
T46 |
16 |
|
T52 |
9 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61580 |
1 |
|
|
T104 |
634 |
|
T46 |
322 |
|
T52 |
1076 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
56285 |
1 |
|
|
T104 |
523 |
|
T46 |
757 |
|
T52 |
442 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56381 |
1 |
|
|
T104 |
1715 |
|
T46 |
1527 |
|
T52 |
348 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41053 |
1 |
|
|
T104 |
410 |
|
T46 |
515 |
|
T52 |
458 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T104 |
24 |
|
T46 |
35 |
|
T52 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T104 |
22 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T104 |
24 |
|
T46 |
35 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T104 |
22 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T104 |
24 |
|
T46 |
35 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T104 |
22 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T104 |
24 |
|
T46 |
35 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T104 |
20 |
|
T46 |
32 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T104 |
24 |
|
T46 |
35 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T104 |
20 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T104 |
24 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
16 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T104 |
20 |
|
T46 |
31 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T104 |
21 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T104 |
19 |
|
T46 |
31 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
13 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T104 |
20 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T104 |
19 |
|
T46 |
27 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T104 |
20 |
|
T46 |
34 |
|
T52 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T104 |
19 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T104 |
20 |
|
T46 |
32 |
|
T52 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T104 |
17 |
|
T46 |
25 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T104 |
20 |
|
T46 |
32 |
|
T52 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T104 |
15 |
|
T46 |
24 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T104 |
19 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T104 |
15 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T104 |
19 |
|
T46 |
31 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T104 |
15 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T104 |
18 |
|
T46 |
29 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T104 |
15 |
|
T46 |
22 |
|
T52 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T104 |
18 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T104 |
15 |
|
T46 |
22 |
|
T52 |
13 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60605 |
1 |
|
|
T104 |
789 |
|
T46 |
1875 |
|
T52 |
1084 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45001 |
1 |
|
|
T104 |
420 |
|
T46 |
604 |
|
T52 |
315 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63704 |
1 |
|
|
T104 |
1716 |
|
T46 |
491 |
|
T52 |
685 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45671 |
1 |
|
|
T104 |
403 |
|
T46 |
428 |
|
T52 |
309 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T104 |
24 |
|
T46 |
23 |
|
T52 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T104 |
24 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T104 |
24 |
|
T46 |
22 |
|
T52 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T104 |
24 |
|
T46 |
22 |
|
T52 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T104 |
20 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T104 |
20 |
|
T46 |
20 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T104 |
18 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T104 |
20 |
|
T46 |
19 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T104 |
16 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T104 |
20 |
|
T46 |
18 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T104 |
15 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T104 |
20 |
|
T46 |
18 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T104 |
15 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T104 |
14 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T104 |
19 |
|
T46 |
16 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T104 |
14 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T104 |
19 |
|
T46 |
16 |
|
T52 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T104 |
14 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53801 |
1 |
|
|
T104 |
533 |
|
T46 |
492 |
|
T52 |
394 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50574 |
1 |
|
|
T104 |
585 |
|
T46 |
499 |
|
T52 |
968 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62106 |
1 |
|
|
T104 |
1634 |
|
T46 |
553 |
|
T52 |
654 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48933 |
1 |
|
|
T104 |
574 |
|
T46 |
1673 |
|
T52 |
314 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1796 |
1 |
|
|
T104 |
25 |
|
T46 |
31 |
|
T52 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T104 |
25 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T104 |
25 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T104 |
24 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T104 |
25 |
|
T46 |
30 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T104 |
23 |
|
T46 |
31 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T104 |
24 |
|
T46 |
29 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T104 |
23 |
|
T46 |
31 |
|
T52 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T104 |
23 |
|
T46 |
28 |
|
T52 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T104 |
23 |
|
T46 |
31 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T104 |
23 |
|
T46 |
28 |
|
T52 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
12 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T104 |
23 |
|
T46 |
31 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T104 |
21 |
|
T46 |
28 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T104 |
23 |
|
T46 |
30 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T104 |
20 |
|
T46 |
27 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T104 |
22 |
|
T46 |
30 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T104 |
19 |
|
T46 |
26 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T104 |
22 |
|
T46 |
30 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T104 |
19 |
|
T46 |
24 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T104 |
22 |
|
T46 |
29 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T104 |
18 |
|
T46 |
23 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T104 |
21 |
|
T46 |
26 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T104 |
17 |
|
T46 |
23 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T104 |
21 |
|
T46 |
26 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T104 |
20 |
|
T46 |
26 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T104 |
20 |
|
T46 |
25 |
|
T52 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T104 |
20 |
|
T46 |
25 |
|
T52 |
11 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57009 |
1 |
|
|
T104 |
745 |
|
T46 |
1644 |
|
T52 |
555 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44678 |
1 |
|
|
T104 |
511 |
|
T46 |
488 |
|
T52 |
370 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66405 |
1 |
|
|
T104 |
566 |
|
T46 |
837 |
|
T52 |
1070 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47801 |
1 |
|
|
T104 |
1415 |
|
T46 |
348 |
|
T52 |
337 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T104 |
27 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T104 |
27 |
|
T46 |
23 |
|
T52 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T104 |
25 |
|
T46 |
22 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T104 |
25 |
|
T46 |
22 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T104 |
25 |
|
T46 |
21 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T104 |
20 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T104 |
24 |
|
T46 |
21 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T104 |
19 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T104 |
23 |
|
T46 |
20 |
|
T52 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
12 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64456 |
1 |
|
|
T104 |
706 |
|
T46 |
1771 |
|
T52 |
491 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45534 |
1 |
|
|
T104 |
485 |
|
T46 |
238 |
|
T52 |
301 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59448 |
1 |
|
|
T104 |
892 |
|
T46 |
1028 |
|
T52 |
1202 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46562 |
1 |
|
|
T104 |
1349 |
|
T46 |
436 |
|
T52 |
324 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T104 |
23 |
|
T46 |
16 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T104 |
23 |
|
T46 |
15 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T104 |
23 |
|
T46 |
15 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T104 |
18 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T104 |
23 |
|
T46 |
15 |
|
T52 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T104 |
18 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T104 |
22 |
|
T46 |
15 |
|
T52 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T104 |
21 |
|
T46 |
15 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T104 |
16 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T104 |
21 |
|
T46 |
15 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T104 |
19 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T104 |
16 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T104 |
16 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
11 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59916 |
1 |
|
|
T104 |
1506 |
|
T46 |
671 |
|
T52 |
311 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53163 |
1 |
|
|
T104 |
464 |
|
T46 |
559 |
|
T52 |
1106 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59208 |
1 |
|
|
T104 |
642 |
|
T46 |
1954 |
|
T52 |
312 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43713 |
1 |
|
|
T104 |
662 |
|
T46 |
277 |
|
T52 |
444 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T104 |
27 |
|
T46 |
20 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T104 |
28 |
|
T46 |
19 |
|
T52 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T104 |
26 |
|
T46 |
20 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T104 |
28 |
|
T46 |
19 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T104 |
23 |
|
T46 |
20 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T104 |
28 |
|
T46 |
17 |
|
T52 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T104 |
28 |
|
T46 |
16 |
|
T52 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T104 |
20 |
|
T46 |
20 |
|
T52 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T104 |
28 |
|
T46 |
16 |
|
T52 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T104 |
19 |
|
T46 |
19 |
|
T52 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T104 |
28 |
|
T46 |
16 |
|
T52 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T104 |
18 |
|
T46 |
17 |
|
T52 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T104 |
28 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T104 |
18 |
|
T46 |
17 |
|
T52 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T104 |
28 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T104 |
16 |
|
T46 |
17 |
|
T52 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T104 |
28 |
|
T46 |
13 |
|
T52 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T104 |
16 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T104 |
28 |
|
T46 |
13 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T104 |
27 |
|
T46 |
13 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T104 |
27 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T104 |
15 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T104 |
27 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T104 |
27 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
12 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T104 |
27 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54668 |
1 |
|
|
T104 |
693 |
|
T46 |
2005 |
|
T52 |
508 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54112 |
1 |
|
|
T104 |
307 |
|
T46 |
282 |
|
T52 |
205 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53810 |
1 |
|
|
T104 |
1101 |
|
T46 |
803 |
|
T52 |
493 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52166 |
1 |
|
|
T104 |
1386 |
|
T46 |
325 |
|
T52 |
1158 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1801 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T104 |
15 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T104 |
15 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T104 |
15 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T104 |
13 |
|
T46 |
13 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T104 |
12 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T104 |
9 |
|
T46 |
12 |
|
T52 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
15 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58157 |
1 |
|
|
T104 |
143 |
|
T46 |
512 |
|
T52 |
542 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40971 |
1 |
|
|
T104 |
578 |
|
T46 |
511 |
|
T52 |
405 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64109 |
1 |
|
|
T104 |
1783 |
|
T46 |
1756 |
|
T52 |
1124 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52163 |
1 |
|
|
T104 |
923 |
|
T46 |
560 |
|
T52 |
364 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T104 |
29 |
|
T46 |
25 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T104 |
29 |
|
T46 |
25 |
|
T52 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T104 |
29 |
|
T46 |
25 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T104 |
29 |
|
T46 |
24 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T104 |
28 |
|
T46 |
24 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T104 |
28 |
|
T46 |
24 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T104 |
28 |
|
T46 |
24 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T104 |
5 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T104 |
25 |
|
T46 |
20 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T104 |
28 |
|
T46 |
23 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T104 |
28 |
|
T46 |
22 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T104 |
27 |
|
T46 |
21 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T104 |
23 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T104 |
25 |
|
T46 |
21 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T104 |
23 |
|
T46 |
20 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T104 |
20 |
|
T46 |
19 |
|
T52 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
4 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T104 |
18 |
|
T46 |
19 |
|
T52 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
4 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
10 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60784 |
1 |
|
|
T104 |
401 |
|
T46 |
1468 |
|
T52 |
673 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48077 |
1 |
|
|
T104 |
612 |
|
T46 |
682 |
|
T52 |
228 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61402 |
1 |
|
|
T104 |
1698 |
|
T46 |
403 |
|
T52 |
1265 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45031 |
1 |
|
|
T104 |
495 |
|
T46 |
763 |
|
T52 |
231 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T104 |
31 |
|
T46 |
33 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T104 |
29 |
|
T46 |
32 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T104 |
31 |
|
T46 |
30 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T104 |
28 |
|
T46 |
31 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T104 |
31 |
|
T46 |
29 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T104 |
28 |
|
T46 |
29 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T104 |
30 |
|
T46 |
29 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T104 |
28 |
|
T46 |
28 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T104 |
28 |
|
T46 |
27 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T104 |
28 |
|
T46 |
28 |
|
T52 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
12 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T104 |
27 |
|
T46 |
26 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T104 |
27 |
|
T46 |
26 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T104 |
26 |
|
T46 |
26 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T104 |
26 |
|
T46 |
25 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T104 |
26 |
|
T46 |
25 |
|
T52 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T104 |
25 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T104 |
25 |
|
T46 |
25 |
|
T52 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T104 |
25 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T104 |
23 |
|
T46 |
24 |
|
T52 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T104 |
24 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T104 |
21 |
|
T46 |
24 |
|
T52 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T104 |
24 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
9 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T104 |
22 |
|
T46 |
24 |
|
T52 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
11 |
|
T46 |
6 |
|
T52 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
7 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64760 |
1 |
|
|
T104 |
630 |
|
T46 |
1918 |
|
T52 |
444 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41936 |
1 |
|
|
T104 |
421 |
|
T46 |
400 |
|
T52 |
457 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59918 |
1 |
|
|
T104 |
912 |
|
T46 |
857 |
|
T52 |
233 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49474 |
1 |
|
|
T104 |
1516 |
|
T46 |
262 |
|
T52 |
1003 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T104 |
19 |
|
T46 |
15 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T104 |
19 |
|
T46 |
15 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T104 |
19 |
|
T46 |
15 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T104 |
19 |
|
T46 |
14 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T104 |
18 |
|
T46 |
14 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T104 |
17 |
|
T46 |
14 |
|
T52 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
13 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T104 |
17 |
|
T46 |
14 |
|
T52 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T104 |
17 |
|
T46 |
13 |
|
T52 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T104 |
16 |
|
T46 |
13 |
|
T52 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T104 |
16 |
|
T46 |
13 |
|
T52 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T104 |
15 |
|
T46 |
14 |
|
T52 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T104 |
15 |
|
T46 |
13 |
|
T52 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
10 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
17 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55203 |
1 |
|
|
T104 |
788 |
|
T46 |
512 |
|
T52 |
1093 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49333 |
1 |
|
|
T104 |
1397 |
|
T46 |
1479 |
|
T52 |
421 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62717 |
1 |
|
|
T104 |
991 |
|
T46 |
1058 |
|
T52 |
273 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47357 |
1 |
|
|
T104 |
400 |
|
T46 |
460 |
|
T52 |
519 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1803 |
1 |
|
|
T104 |
13 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1734 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T104 |
17 |
|
T46 |
15 |
|
T52 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T104 |
17 |
|
T46 |
14 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T104 |
17 |
|
T46 |
13 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
11 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T104 |
17 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T104 |
16 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T104 |
16 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T104 |
11 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59841 |
1 |
|
|
T104 |
1079 |
|
T46 |
939 |
|
T52 |
309 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52075 |
1 |
|
|
T104 |
269 |
|
T46 |
1383 |
|
T52 |
597 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59638 |
1 |
|
|
T104 |
1667 |
|
T46 |
778 |
|
T52 |
1002 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43614 |
1 |
|
|
T104 |
482 |
|
T46 |
380 |
|
T52 |
376 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T104 |
17 |
|
T46 |
14 |
|
T52 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T104 |
16 |
|
T46 |
16 |
|
T52 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T104 |
17 |
|
T46 |
13 |
|
T52 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T104 |
15 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T104 |
14 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T104 |
14 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T104 |
14 |
|
T46 |
15 |
|
T52 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T104 |
14 |
|
T46 |
13 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
14 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T104 |
14 |
|
T46 |
13 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T104 |
14 |
|
T46 |
13 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T104 |
14 |
|
T46 |
13 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
13 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
13 |
|
T52 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
15 |
|
T52 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T104 |
13 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58876 |
1 |
|
|
T104 |
1347 |
|
T46 |
838 |
|
T52 |
178 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46718 |
1 |
|
|
T104 |
800 |
|
T46 |
1421 |
|
T52 |
346 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55458 |
1 |
|
|
T104 |
436 |
|
T46 |
847 |
|
T52 |
345 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52397 |
1 |
|
|
T104 |
548 |
|
T46 |
312 |
|
T52 |
1283 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1813 |
1 |
|
|
T104 |
33 |
|
T46 |
14 |
|
T52 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1814 |
1 |
|
|
T104 |
33 |
|
T46 |
15 |
|
T52 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T104 |
33 |
|
T46 |
14 |
|
T52 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T104 |
33 |
|
T46 |
14 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T104 |
30 |
|
T46 |
14 |
|
T52 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T104 |
33 |
|
T46 |
14 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T104 |
30 |
|
T46 |
14 |
|
T52 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T104 |
32 |
|
T46 |
14 |
|
T52 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T104 |
28 |
|
T46 |
13 |
|
T52 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T104 |
32 |
|
T46 |
14 |
|
T52 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T104 |
28 |
|
T46 |
13 |
|
T52 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T104 |
32 |
|
T46 |
14 |
|
T52 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T104 |
27 |
|
T46 |
13 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T104 |
10 |
|
T46 |
17 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T104 |
32 |
|
T46 |
14 |
|
T52 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T104 |
27 |
|
T46 |
13 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T104 |
32 |
|
T46 |
13 |
|
T52 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T104 |
26 |
|
T46 |
13 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T104 |
32 |
|
T46 |
12 |
|
T52 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T104 |
10 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T104 |
25 |
|
T46 |
13 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T104 |
32 |
|
T46 |
11 |
|
T52 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T104 |
31 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T104 |
23 |
|
T46 |
12 |
|
T52 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T104 |
31 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T104 |
22 |
|
T46 |
12 |
|
T52 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T104 |
31 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T104 |
21 |
|
T46 |
12 |
|
T52 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
10 |
|
T46 |
16 |
|
T52 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T104 |
30 |
|
T46 |
11 |
|
T52 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T104 |
21 |
|
T46 |
12 |
|
T52 |
25 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63558 |
1 |
|
|
T104 |
745 |
|
T46 |
619 |
|
T52 |
367 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45815 |
1 |
|
|
T104 |
400 |
|
T46 |
1808 |
|
T52 |
532 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62195 |
1 |
|
|
T104 |
834 |
|
T46 |
688 |
|
T52 |
364 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43277 |
1 |
|
|
T104 |
1364 |
|
T46 |
337 |
|
T52 |
934 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1772 |
1 |
|
|
T104 |
18 |
|
T46 |
21 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1732 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T104 |
20 |
|
T46 |
19 |
|
T52 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T104 |
17 |
|
T46 |
20 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T104 |
18 |
|
T46 |
18 |
|
T52 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T104 |
17 |
|
T46 |
17 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T104 |
17 |
|
T46 |
16 |
|
T52 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T104 |
15 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T104 |
16 |
|
T46 |
14 |
|
T52 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T104 |
15 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T104 |
14 |
|
T46 |
14 |
|
T52 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
16 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T104 |
15 |
|
T46 |
18 |
|
T52 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T104 |
14 |
|
T46 |
9 |
|
T52 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T104 |
14 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58277 |
1 |
|
|
T104 |
419 |
|
T46 |
834 |
|
T52 |
341 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48240 |
1 |
|
|
T104 |
1779 |
|
T46 |
1425 |
|
T52 |
1196 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58566 |
1 |
|
|
T104 |
683 |
|
T46 |
886 |
|
T52 |
304 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50281 |
1 |
|
|
T104 |
352 |
|
T46 |
299 |
|
T52 |
415 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1793 |
1 |
|
|
T104 |
32 |
|
T46 |
16 |
|
T52 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1797 |
1 |
|
|
T104 |
30 |
|
T46 |
17 |
|
T52 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T104 |
32 |
|
T46 |
16 |
|
T52 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T104 |
29 |
|
T46 |
17 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T104 |
32 |
|
T46 |
16 |
|
T52 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T104 |
27 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T104 |
32 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T104 |
32 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T104 |
23 |
|
T46 |
14 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T104 |
23 |
|
T46 |
13 |
|
T52 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T104 |
8 |
|
T46 |
15 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T104 |
22 |
|
T46 |
12 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T104 |
32 |
|
T46 |
15 |
|
T52 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T104 |
21 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T104 |
31 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T104 |
20 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T104 |
31 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T104 |
19 |
|
T46 |
10 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T104 |
30 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T104 |
18 |
|
T46 |
10 |
|
T52 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T104 |
30 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T104 |
18 |
|
T46 |
9 |
|
T52 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T104 |
29 |
|
T46 |
15 |
|
T52 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T104 |
9 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
15 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57500 |
1 |
|
|
T104 |
925 |
|
T46 |
580 |
|
T52 |
699 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46336 |
1 |
|
|
T104 |
411 |
|
T46 |
591 |
|
T52 |
403 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60537 |
1 |
|
|
T104 |
1933 |
|
T46 |
1405 |
|
T52 |
316 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51087 |
1 |
|
|
T104 |
359 |
|
T46 |
642 |
|
T52 |
856 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T104 |
14 |
|
T46 |
35 |
|
T52 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T104 |
11 |
|
T46 |
36 |
|
T52 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T104 |
14 |
|
T46 |
32 |
|
T52 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T104 |
11 |
|
T46 |
36 |
|
T52 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T104 |
13 |
|
T46 |
32 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T104 |
11 |
|
T46 |
33 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T104 |
11 |
|
T46 |
30 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T104 |
11 |
|
T46 |
33 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T104 |
11 |
|
T46 |
30 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T104 |
10 |
|
T46 |
31 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T104 |
10 |
|
T46 |
30 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T104 |
14 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T104 |
10 |
|
T46 |
31 |
|
T52 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T104 |
10 |
|
T46 |
30 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T104 |
11 |
|
T46 |
29 |
|
T52 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T104 |
10 |
|
T46 |
28 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T104 |
11 |
|
T46 |
28 |
|
T52 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T104 |
10 |
|
T46 |
28 |
|
T52 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T104 |
11 |
|
T46 |
27 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T104 |
10 |
|
T46 |
28 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T104 |
11 |
|
T46 |
27 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T104 |
10 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T104 |
11 |
|
T46 |
26 |
|
T52 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T104 |
10 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T104 |
11 |
|
T46 |
26 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T104 |
9 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T104 |
11 |
|
T46 |
25 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T104 |
9 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T104 |
11 |
|
T46 |
23 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T104 |
9 |
|
T46 |
26 |
|
T52 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
13 |
|
T46 |
6 |
|
T52 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T104 |
11 |
|
T46 |
22 |
|
T52 |
9 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61376 |
1 |
|
|
T104 |
799 |
|
T46 |
531 |
|
T52 |
520 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46120 |
1 |
|
|
T104 |
1440 |
|
T46 |
625 |
|
T52 |
328 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64946 |
1 |
|
|
T104 |
643 |
|
T46 |
1693 |
|
T52 |
418 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43633 |
1 |
|
|
T104 |
516 |
|
T46 |
481 |
|
T52 |
1118 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T104 |
21 |
|
T46 |
25 |
|
T52 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T104 |
22 |
|
T46 |
28 |
|
T52 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T104 |
20 |
|
T46 |
25 |
|
T52 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T104 |
19 |
|
T46 |
25 |
|
T52 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T104 |
19 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T104 |
21 |
|
T46 |
25 |
|
T52 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T104 |
19 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T104 |
21 |
|
T46 |
24 |
|
T52 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T104 |
18 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T104 |
21 |
|
T46 |
24 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T104 |
18 |
|
T46 |
23 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T104 |
20 |
|
T46 |
24 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T104 |
18 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T104 |
18 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T104 |
18 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T104 |
20 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T104 |
16 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T104 |
20 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T104 |
14 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T104 |
13 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T104 |
19 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T104 |
12 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T104 |
13 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66942 |
1 |
|
|
T104 |
1537 |
|
T46 |
629 |
|
T52 |
1066 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45932 |
1 |
|
|
T104 |
519 |
|
T46 |
382 |
|
T52 |
186 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57412 |
1 |
|
|
T104 |
640 |
|
T46 |
751 |
|
T52 |
760 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44930 |
1 |
|
|
T104 |
549 |
|
T46 |
1686 |
|
T52 |
289 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T104 |
28 |
|
T46 |
21 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T104 |
29 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T104 |
28 |
|
T46 |
21 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T104 |
29 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T104 |
28 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T104 |
29 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T104 |
28 |
|
T46 |
19 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T104 |
29 |
|
T46 |
19 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T104 |
26 |
|
T46 |
19 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T104 |
29 |
|
T46 |
19 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T104 |
29 |
|
T46 |
19 |
|
T52 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T104 |
23 |
|
T46 |
16 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T104 |
27 |
|
T46 |
19 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T104 |
22 |
|
T46 |
15 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T104 |
26 |
|
T46 |
19 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T104 |
22 |
|
T46 |
14 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T104 |
26 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T104 |
22 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T104 |
25 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T104 |
25 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T104 |
20 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T104 |
24 |
|
T46 |
18 |
|
T52 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T104 |
19 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T104 |
22 |
|
T46 |
17 |
|
T52 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T104 |
19 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T104 |
22 |
|
T46 |
17 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T104 |
17 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T104 |
10 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T104 |
22 |
|
T46 |
17 |
|
T52 |
11 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64612 |
1 |
|
|
T104 |
732 |
|
T46 |
679 |
|
T52 |
342 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49678 |
1 |
|
|
T104 |
583 |
|
T46 |
518 |
|
T52 |
1096 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52944 |
1 |
|
|
T104 |
631 |
|
T46 |
430 |
|
T52 |
452 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48214 |
1 |
|
|
T104 |
1395 |
|
T46 |
1692 |
|
T52 |
338 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T104 |
23 |
|
T46 |
28 |
|
T52 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T104 |
25 |
|
T46 |
28 |
|
T52 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T104 |
22 |
|
T46 |
27 |
|
T52 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T104 |
25 |
|
T46 |
27 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T104 |
23 |
|
T46 |
26 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T104 |
23 |
|
T46 |
25 |
|
T52 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T104 |
22 |
|
T46 |
25 |
|
T52 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T104 |
22 |
|
T46 |
26 |
|
T52 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T104 |
22 |
|
T46 |
22 |
|
T52 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T104 |
22 |
|
T46 |
25 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T104 |
22 |
|
T46 |
24 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T104 |
21 |
|
T46 |
22 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T104 |
20 |
|
T46 |
22 |
|
T52 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T104 |
11 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T104 |
20 |
|
T46 |
22 |
|
T52 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T104 |
10 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T104 |
20 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T104 |
20 |
|
T46 |
22 |
|
T52 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T104 |
10 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T104 |
19 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T104 |
18 |
|
T46 |
21 |
|
T52 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
10 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T104 |
17 |
|
T46 |
20 |
|
T52 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
10 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
10 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
13 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61057 |
1 |
|
|
T104 |
662 |
|
T46 |
1399 |
|
T52 |
472 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47607 |
1 |
|
|
T104 |
618 |
|
T46 |
533 |
|
T52 |
1080 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55132 |
1 |
|
|
T104 |
681 |
|
T46 |
325 |
|
T52 |
229 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50526 |
1 |
|
|
T104 |
1515 |
|
T46 |
860 |
|
T52 |
515 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1808 |
1 |
|
|
T104 |
19 |
|
T46 |
35 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1810 |
1 |
|
|
T104 |
20 |
|
T46 |
34 |
|
T52 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T104 |
18 |
|
T46 |
33 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T104 |
20 |
|
T46 |
34 |
|
T52 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T104 |
18 |
|
T46 |
33 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T104 |
20 |
|
T46 |
34 |
|
T52 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T104 |
18 |
|
T46 |
32 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T104 |
19 |
|
T46 |
34 |
|
T52 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T104 |
18 |
|
T46 |
31 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T104 |
18 |
|
T46 |
34 |
|
T52 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T104 |
18 |
|
T46 |
29 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T104 |
18 |
|
T46 |
34 |
|
T52 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T104 |
18 |
|
T46 |
29 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T104 |
18 |
|
T46 |
34 |
|
T52 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T104 |
18 |
|
T46 |
29 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T104 |
18 |
|
T46 |
34 |
|
T52 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T104 |
18 |
|
T46 |
34 |
|
T52 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T104 |
17 |
|
T46 |
34 |
|
T52 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T104 |
17 |
|
T46 |
28 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T104 |
17 |
|
T46 |
34 |
|
T52 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T104 |
17 |
|
T46 |
24 |
|
T52 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T104 |
17 |
|
T46 |
34 |
|
T52 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T104 |
17 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T104 |
17 |
|
T46 |
34 |
|
T52 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T104 |
17 |
|
T46 |
20 |
|
T52 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T104 |
17 |
|
T46 |
32 |
|
T52 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T104 |
17 |
|
T46 |
20 |
|
T52 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T104 |
17 |
|
T46 |
32 |
|
T52 |
13 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60641 |
1 |
|
|
T104 |
1488 |
|
T46 |
678 |
|
T52 |
462 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48252 |
1 |
|
|
T104 |
554 |
|
T46 |
289 |
|
T52 |
532 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60190 |
1 |
|
|
T104 |
605 |
|
T46 |
939 |
|
T52 |
367 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46761 |
1 |
|
|
T104 |
621 |
|
T46 |
1464 |
|
T52 |
1014 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T104 |
28 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T104 |
27 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T104 |
27 |
|
T46 |
12 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T104 |
27 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T104 |
27 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T104 |
26 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T104 |
25 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T104 |
26 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
9 |
|
T46 |
15 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T104 |
25 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T104 |
26 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T104 |
25 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T104 |
26 |
|
T46 |
11 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T104 |
24 |
|
T46 |
15 |
|
T52 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T104 |
25 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T104 |
24 |
|
T46 |
13 |
|
T52 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T104 |
25 |
|
T46 |
11 |
|
T52 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T104 |
24 |
|
T46 |
13 |
|
T52 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T104 |
25 |
|
T46 |
11 |
|
T52 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T104 |
24 |
|
T46 |
11 |
|
T52 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
9 |
|
T46 |
20 |
|
T52 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
12 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59022 |
1 |
|
|
T104 |
664 |
|
T46 |
691 |
|
T52 |
420 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49030 |
1 |
|
|
T104 |
453 |
|
T46 |
339 |
|
T52 |
990 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62892 |
1 |
|
|
T104 |
1666 |
|
T46 |
1708 |
|
T52 |
460 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44530 |
1 |
|
|
T104 |
522 |
|
T46 |
551 |
|
T52 |
483 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T104 |
28 |
|
T46 |
27 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T104 |
20 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T104 |
27 |
|
T46 |
27 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T104 |
20 |
|
T46 |
24 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T104 |
27 |
|
T46 |
27 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T104 |
27 |
|
T46 |
27 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T104 |
27 |
|
T46 |
27 |
|
T52 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T104 |
17 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T104 |
25 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
8 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T104 |
20 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T104 |
20 |
|
T46 |
20 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T104 |
20 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T104 |
19 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T104 |
19 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T104 |
19 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T104 |
19 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T104 |
18 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
8 |
|
T46 |
9 |
|
T52 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T104 |
16 |
|
T46 |
15 |
|
T52 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
16 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T104 |
18 |
|
T46 |
21 |
|
T52 |
14 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58081 |
1 |
|
|
T104 |
446 |
|
T46 |
463 |
|
T52 |
384 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49081 |
1 |
|
|
T104 |
678 |
|
T46 |
653 |
|
T52 |
1161 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59897 |
1 |
|
|
T104 |
622 |
|
T46 |
648 |
|
T52 |
324 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48187 |
1 |
|
|
T104 |
1485 |
|
T46 |
1543 |
|
T52 |
448 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T104 |
29 |
|
T46 |
26 |
|
T52 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T104 |
28 |
|
T46 |
26 |
|
T52 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T104 |
28 |
|
T46 |
26 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T104 |
28 |
|
T46 |
26 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T104 |
26 |
|
T46 |
26 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T104 |
26 |
|
T46 |
26 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T104 |
23 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T104 |
26 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T104 |
24 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T104 |
23 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T104 |
24 |
|
T46 |
24 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T104 |
21 |
|
T46 |
24 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T104 |
21 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T104 |
21 |
|
T46 |
23 |
|
T52 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T104 |
20 |
|
T46 |
16 |
|
T52 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T104 |
21 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T104 |
19 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T104 |
21 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T104 |
19 |
|
T46 |
14 |
|
T52 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T104 |
21 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T104 |
19 |
|
T46 |
12 |
|
T52 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
11 |
|
T46 |
10 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T104 |
21 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
13 |
|
T46 |
11 |
|
T52 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T104 |
19 |
|
T46 |
11 |
|
T52 |
13 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61739 |
1 |
|
|
T104 |
785 |
|
T46 |
534 |
|
T52 |
239 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48740 |
1 |
|
|
T104 |
1410 |
|
T46 |
488 |
|
T52 |
1218 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57724 |
1 |
|
|
T104 |
796 |
|
T46 |
1962 |
|
T52 |
270 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47518 |
1 |
|
|
T104 |
374 |
|
T46 |
431 |
|
T52 |
568 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T104 |
18 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T104 |
17 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T104 |
16 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T104 |
16 |
|
T46 |
21 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T104 |
16 |
|
T46 |
20 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T104 |
16 |
|
T46 |
19 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T104 |
15 |
|
T46 |
10 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T104 |
16 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T104 |
16 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T104 |
16 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T104 |
21 |
|
T46 |
17 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T104 |
15 |
|
T46 |
18 |
|
T52 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T104 |
15 |
|
T46 |
9 |
|
T52 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T104 |
14 |
|
T46 |
17 |
|
T52 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
10 |
|
T52 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
19 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57256 |
1 |
|
|
T104 |
758 |
|
T46 |
688 |
|
T52 |
382 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47423 |
1 |
|
|
T104 |
504 |
|
T46 |
425 |
|
T52 |
252 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60985 |
1 |
|
|
T104 |
1411 |
|
T46 |
1710 |
|
T52 |
1133 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49978 |
1 |
|
|
T104 |
547 |
|
T46 |
551 |
|
T52 |
473 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T104 |
26 |
|
T46 |
25 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T104 |
30 |
|
T46 |
27 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T104 |
29 |
|
T46 |
26 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T104 |
29 |
|
T46 |
25 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T104 |
29 |
|
T46 |
25 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T104 |
23 |
|
T46 |
19 |
|
T52 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T104 |
28 |
|
T46 |
25 |
|
T52 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T104 |
11 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T104 |
28 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T104 |
22 |
|
T46 |
17 |
|
T52 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T104 |
28 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T104 |
21 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T104 |
26 |
|
T46 |
25 |
|
T52 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T104 |
19 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T104 |
18 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T104 |
18 |
|
T46 |
17 |
|
T52 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T104 |
25 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T104 |
23 |
|
T46 |
21 |
|
T52 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
14 |
|
T46 |
10 |
|
T52 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T104 |
18 |
|
T46 |
16 |
|
T52 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T104 |
23 |
|
T46 |
20 |
|
T52 |
16 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57745 |
1 |
|
|
T104 |
752 |
|
T46 |
2167 |
|
T52 |
682 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54162 |
1 |
|
|
T104 |
1344 |
|
T46 |
359 |
|
T52 |
286 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60837 |
1 |
|
|
T104 |
892 |
|
T46 |
862 |
|
T52 |
1060 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42656 |
1 |
|
|
T104 |
502 |
|
T46 |
119 |
|
T52 |
444 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T104 |
18 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T104 |
18 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T104 |
22 |
|
T46 |
11 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T104 |
18 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T104 |
21 |
|
T46 |
11 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T104 |
18 |
|
T46 |
10 |
|
T52 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T104 |
20 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T104 |
18 |
|
T46 |
8 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T104 |
20 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T104 |
17 |
|
T46 |
8 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T104 |
19 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T104 |
17 |
|
T46 |
8 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T104 |
8 |
|
T46 |
17 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T104 |
19 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T104 |
17 |
|
T46 |
7 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T104 |
17 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T104 |
17 |
|
T46 |
6 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T104 |
17 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T104 |
17 |
|
T46 |
5 |
|
T52 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T104 |
16 |
|
T46 |
11 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T104 |
16 |
|
T46 |
5 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T104 |
15 |
|
T46 |
5 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T104 |
15 |
|
T46 |
11 |
|
T52 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T104 |
14 |
|
T46 |
5 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T104 |
14 |
|
T46 |
4 |
|
T52 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T104 |
8 |
|
T46 |
16 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T104 |
14 |
|
T46 |
11 |
|
T52 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T104 |
11 |
|
T46 |
17 |
|
T52 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T104 |
14 |
|
T46 |
3 |
|
T52 |
11 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60156 |
1 |
|
|
T104 |
515 |
|
T46 |
875 |
|
T52 |
706 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49718 |
1 |
|
|
T104 |
821 |
|
T46 |
289 |
|
T52 |
201 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60490 |
1 |
|
|
T104 |
626 |
|
T46 |
1815 |
|
T52 |
1276 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44579 |
1 |
|
|
T104 |
1428 |
|
T46 |
454 |
|
T52 |
284 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T104 |
29 |
|
T46 |
20 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T104 |
29 |
|
T46 |
20 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T104 |
28 |
|
T46 |
19 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T104 |
26 |
|
T46 |
16 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T104 |
28 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T104 |
25 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T104 |
24 |
|
T46 |
14 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T104 |
24 |
|
T46 |
13 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T104 |
26 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T104 |
24 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T104 |
24 |
|
T46 |
12 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T104 |
24 |
|
T46 |
17 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T104 |
24 |
|
T46 |
11 |
|
T52 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T104 |
24 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T104 |
24 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T104 |
24 |
|
T46 |
15 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T104 |
22 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T104 |
22 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T104 |
21 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T104 |
21 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T104 |
7 |
|
T46 |
15 |
|
T52 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T104 |
20 |
|
T46 |
10 |
|
T52 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
5 |
|
T46 |
12 |
|
T52 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T104 |
21 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55770 |
1 |
|
|
T104 |
868 |
|
T46 |
512 |
|
T52 |
1197 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51489 |
1 |
|
|
T104 |
290 |
|
T46 |
467 |
|
T52 |
195 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63782 |
1 |
|
|
T104 |
1922 |
|
T46 |
706 |
|
T52 |
538 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44730 |
1 |
|
|
T104 |
482 |
|
T46 |
1582 |
|
T52 |
464 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T104 |
15 |
|
T46 |
25 |
|
T52 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T104 |
15 |
|
T46 |
25 |
|
T52 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T104 |
15 |
|
T46 |
25 |
|
T52 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T104 |
14 |
|
T46 |
25 |
|
T52 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T104 |
17 |
|
T46 |
29 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T104 |
14 |
|
T46 |
23 |
|
T52 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T104 |
16 |
|
T46 |
28 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T104 |
14 |
|
T46 |
23 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T104 |
16 |
|
T46 |
27 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T104 |
14 |
|
T46 |
23 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T104 |
16 |
|
T46 |
27 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T104 |
13 |
|
T46 |
22 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T104 |
15 |
|
T46 |
27 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T104 |
13 |
|
T46 |
21 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T104 |
14 |
|
T46 |
25 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T104 |
12 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T104 |
14 |
|
T46 |
24 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T104 |
12 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T104 |
14 |
|
T46 |
24 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T104 |
12 |
|
T46 |
19 |
|
T52 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T104 |
14 |
|
T46 |
23 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T104 |
12 |
|
T46 |
19 |
|
T52 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T104 |
13 |
|
T46 |
23 |
|
T52 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T104 |
12 |
|
T46 |
19 |
|
T52 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T104 |
13 |
|
T46 |
22 |
|
T52 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T104 |
11 |
|
T46 |
12 |
|
T52 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T104 |
12 |
|
T46 |
17 |
|
T52 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
8 |
|
T52 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T104 |
13 |
|
T46 |
22 |
|
T52 |
13 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59858 |
1 |
|
|
T104 |
1772 |
|
T46 |
1964 |
|
T52 |
601 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47997 |
1 |
|
|
T104 |
634 |
|
T46 |
420 |
|
T52 |
379 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61122 |
1 |
|
|
T104 |
616 |
|
T46 |
656 |
|
T52 |
1126 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45502 |
1 |
|
|
T104 |
392 |
|
T46 |
291 |
|
T52 |
219 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1792 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T104 |
24 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T104 |
23 |
|
T46 |
19 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T104 |
21 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T104 |
9 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T104 |
23 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T104 |
10 |
|
T46 |
13 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T104 |
22 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T104 |
20 |
|
T46 |
17 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T104 |
22 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T104 |
20 |
|
T46 |
16 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T104 |
18 |
|
T46 |
13 |
|
T52 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T104 |
17 |
|
T46 |
13 |
|
T52 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T104 |
21 |
|
T46 |
21 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T104 |
15 |
|
T46 |
12 |
|
T52 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T104 |
14 |
|
T46 |
12 |
|
T52 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T104 |
21 |
|
T46 |
19 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T104 |
13 |
|
T46 |
12 |
|
T52 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
10 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T104 |
21 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T104 |
8 |
|
T46 |
14 |
|
T52 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T104 |
12 |
|
T46 |
12 |
|
T52 |
10 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64546 |
1 |
|
|
T104 |
876 |
|
T46 |
743 |
|
T52 |
569 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46659 |
1 |
|
|
T104 |
1314 |
|
T46 |
514 |
|
T52 |
155 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57686 |
1 |
|
|
T104 |
606 |
|
T46 |
1653 |
|
T52 |
378 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47160 |
1 |
|
|
T104 |
509 |
|
T46 |
509 |
|
T52 |
1138 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T104 |
27 |
|
T46 |
25 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T104 |
25 |
|
T46 |
22 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T104 |
27 |
|
T46 |
24 |
|
T52 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T104 |
24 |
|
T46 |
22 |
|
T52 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T104 |
22 |
|
T46 |
21 |
|
T52 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T104 |
26 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T104 |
25 |
|
T46 |
23 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T104 |
24 |
|
T46 |
22 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T104 |
22 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T104 |
22 |
|
T46 |
19 |
|
T52 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T104 |
21 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T104 |
19 |
|
T46 |
20 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T104 |
22 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T104 |
17 |
|
T46 |
19 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T104 |
19 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T104 |
18 |
|
T46 |
18 |
|
T52 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T104 |
17 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T104 |
12 |
|
T46 |
9 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T104 |
18 |
|
T46 |
18 |
|
T52 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T104 |
10 |
|
T46 |
7 |
|
T52 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T104 |
16 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65510 |
1 |
|
|
T104 |
1580 |
|
T46 |
765 |
|
T52 |
320 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42176 |
1 |
|
|
T104 |
688 |
|
T46 |
361 |
|
T52 |
434 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59194 |
1 |
|
|
T104 |
338 |
|
T46 |
1741 |
|
T52 |
484 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48923 |
1 |
|
|
T104 |
574 |
|
T46 |
533 |
|
T52 |
1018 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T104 |
36 |
|
T46 |
20 |
|
T52 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T104 |
37 |
|
T46 |
23 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T104 |
36 |
|
T46 |
20 |
|
T52 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T104 |
37 |
|
T46 |
23 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T104 |
34 |
|
T46 |
20 |
|
T52 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T104 |
37 |
|
T46 |
23 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T104 |
33 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T104 |
37 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T104 |
32 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T104 |
36 |
|
T46 |
23 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T104 |
31 |
|
T46 |
19 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T104 |
36 |
|
T46 |
20 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T104 |
28 |
|
T46 |
18 |
|
T52 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T104 |
35 |
|
T46 |
19 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T104 |
35 |
|
T46 |
19 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T104 |
27 |
|
T46 |
18 |
|
T52 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T104 |
31 |
|
T46 |
19 |
|
T52 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T104 |
27 |
|
T46 |
17 |
|
T52 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T104 |
6 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T104 |
30 |
|
T46 |
19 |
|
T52 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
5 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T104 |
30 |
|
T46 |
18 |
|
T52 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
5 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T104 |
30 |
|
T46 |
18 |
|
T52 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
5 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T104 |
29 |
|
T46 |
17 |
|
T52 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
5 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T104 |
29 |
|
T46 |
16 |
|
T52 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T104 |
7 |
|
T46 |
12 |
|
T52 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T104 |
25 |
|
T46 |
16 |
|
T52 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T104 |
5 |
|
T46 |
9 |
|
T52 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T104 |
27 |
|
T46 |
16 |
|
T52 |
13 |