Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12591379	1			T23	123		T24	247		T25	261
all_values[1]	12591379	1			T23	123		T24	247		T25	261
all_values[2]	12591379	1			T23	123		T24	247		T25	261
all_values[3]	12591379	1			T23	123		T24	247		T25	261
all_values[4]	12591379	1			T23	123		T24	247		T25	261
all_values[5]	12591379	1			T23	123		T24	247		T25	261
all_values[6]	12591379	1			T23	123		T24	247		T25	261
all_values[7]	12591379	1			T23	123		T24	247		T25	261
all_values[8]	12591379	1			T23	123		T24	247		T25	261
all_values[9]	12591379	1			T23	123		T24	247		T25	261
all_values[10]	12591379	1			T23	123		T24	247		T25	261
all_values[11]	12591379	1			T23	123		T24	247		T25	261
all_values[12]	12591379	1			T23	123		T24	247		T25	261
all_values[13]	12591379	1			T23	123		T24	247		T25	261
all_values[14]	12591379	1			T23	123		T24	247		T25	261
all_values[15]	12591379	1			T23	123		T24	247		T25	261
all_values[16]	12591379	1			T23	123		T24	247		T25	261
all_values[17]	12591379	1			T23	123		T24	247		T25	261
all_values[18]	12591379	1			T23	123		T24	247		T25	261
all_values[19]	12591379	1			T23	123		T24	247		T25	261
all_values[20]	12591379	1			T23	123		T24	247		T25	261
all_values[21]	12591379	1			T23	123		T24	247		T25	261
all_values[22]	12591379	1			T23	123		T24	247		T25	261
all_values[23]	12591379	1			T23	123		T24	247		T25	261
all_values[24]	12591379	1			T23	123		T24	247		T25	261
all_values[25]	12591379	1			T23	123		T24	247		T25	261
all_values[26]	12591379	1			T23	123		T24	247		T25	261
all_values[27]	12591379	1			T23	123		T24	247		T25	261
all_values[28]	12591379	1			T23	123		T24	247		T25	261
all_values[29]	12591379	1			T23	123		T24	247		T25	261
all_values[30]	12591379	1			T23	123		T24	247		T25	261
all_values[31]	12591379	1			T23	123		T24	247		T25	261

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

236146561

1

T23

3936

T24

3919

T25

8352

auto[1]

166777567

1

T24

3985

T1

2944

T11

585494

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

101307448

1

T23

3936

T24

1689

T25

8352

auto[1]

301616680

1

T24

6215

T1

6540

T11

105557

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

398504646

1

T23

3936

T24

7904

T25

8352

auto[1]

4419482

1

T1

256

T11

155030

T16

42600

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2660001	1			T23	123		T24	37		T25	261
all_values[0]	auto[0]	auto[0]	auto[1]	4631967	1			T24	115		T1	157		T11	160254
all_values[0]	auto[0]	auto[1]	auto[0]	510236	1			T24	47		T1	12		T11	17905
all_values[0]	auto[0]	auto[1]	auto[1]	4650680	1			T24	48		T1	42		T11	163197
all_values[0]	auto[1]	auto[0]	auto[1]	69646	1			T1	5		T11	2431		T16	686
all_values[0]	auto[1]	auto[1]	auto[1]	68849	1			T1	3		T11	2420		T16	668
all_values[1]	auto[0]	auto[0]	auto[0]	2662279	1			T23	123		T24	24		T25	261
all_values[1]	auto[0]	auto[0]	auto[1]	4640630	1			T24	97		T1	91		T11	166408
all_values[1]	auto[0]	auto[1]	auto[0]	502396	1			T24	39		T11	16218		T16	4557
all_values[1]	auto[0]	auto[1]	auto[1]	4648315	1			T24	87		T1	105		T11	160391
all_values[1]	auto[1]	auto[0]	auto[1]	69057	1			T1	3		T11	2430		T16	704
all_values[1]	auto[1]	auto[1]	auto[1]	68702	1			T1	3		T11	2438		T16	653
all_values[2]	auto[0]	auto[0]	auto[0]	2662776	1			T23	123		T24	27		T25	261
all_values[2]	auto[0]	auto[0]	auto[1]	4647280	1			T24	135		T1	95		T11	160052
all_values[2]	auto[0]	auto[1]	auto[0]	506701	1			T24	16		T1	9		T11	17959
all_values[2]	auto[0]	auto[1]	auto[1]	4636460	1			T24	69		T1	111		T11	164692
all_values[2]	auto[1]	auto[0]	auto[1]	68743	1			T1	4		T11	2397		T16	715
all_values[2]	auto[1]	auto[1]	auto[1]	69419	1			T1	5		T11	2445		T16	627
all_values[3]	auto[0]	auto[0]	auto[0]	2663425	1			T23	123		T24	31		T25	261
all_values[3]	auto[0]	auto[0]	auto[1]	4628494	1			T24	58		T1	38		T11	162706
all_values[3]	auto[0]	auto[1]	auto[0]	499613	1			T24	37		T11	16862		T15	1
all_values[3]	auto[0]	auto[1]	auto[1]	4662120	1			T24	121		T1	154		T11	163008
all_values[3]	auto[1]	auto[0]	auto[1]	68870	1			T1	3		T11	2444		T16	690
all_values[3]	auto[1]	auto[1]	auto[1]	68857	1			T1	4		T11	2445		T16	647
all_values[4]	auto[0]	auto[0]	auto[0]	2663034	1			T23	123		T24	24		T25	261
all_values[4]	auto[0]	auto[0]	auto[1]	4624324	1			T24	106		T1	154		T11	161159
all_values[4]	auto[0]	auto[1]	auto[0]	504937	1			T24	44		T1	10		T11	16469
all_values[4]	auto[0]	auto[1]	auto[1]	4660495	1			T24	73		T1	46		T11	165087
all_values[4]	auto[1]	auto[0]	auto[1]	69401	1			T1	3		T11	2529		T16	670
all_values[4]	auto[1]	auto[1]	auto[1]	69188	1			T1	2		T11	2336		T16	631
all_values[5]	auto[0]	auto[0]	auto[0]	2665895	1			T23	123		T24	28		T25	261
all_values[5]	auto[0]	auto[0]	auto[1]	4617844	1			T24	86		T1	124		T11	154287
all_values[5]	auto[0]	auto[1]	auto[0]	496861	1			T24	20		T1	1		T11	18428
all_values[5]	auto[0]	auto[1]	auto[1]	4672608	1			T24	113		T1	49		T11	169910
all_values[5]	auto[1]	auto[0]	auto[1]	69576	1			T1	11		T11	2534		T16	647
all_values[5]	auto[1]	auto[1]	auto[1]	68595	1			T1	1		T11	2349		T16	672
all_values[6]	auto[0]	auto[0]	auto[0]	2666439	1			T23	123		T24	20		T25	261
all_values[6]	auto[0]	auto[0]	auto[1]	4651832	1			T24	92		T1	132		T11	160303
all_values[6]	auto[0]	auto[1]	auto[0]	498128	1			T24	9		T1	7		T11	17074
all_values[6]	auto[0]	auto[1]	auto[1]	4636656	1			T24	126		T1	69		T11	164486
all_values[6]	auto[1]	auto[0]	auto[1]	69792	1			T1	9		T11	2404		T16	657
all_values[6]	auto[1]	auto[1]	auto[1]	68532	1			T1	2		T11	2380		T16	696
all_values[7]	auto[0]	auto[0]	auto[0]	2663380	1			T23	123		T24	24		T25	261
all_values[7]	auto[0]	auto[0]	auto[1]	4645654	1			T24	100		T1	152		T11	159916
all_values[7]	auto[0]	auto[1]	auto[0]	499650	1			T24	21		T1	9		T11	16585
all_values[7]	auto[0]	auto[1]	auto[1]	4644749	1			T24	102		T1	32		T11	166029
all_values[7]	auto[1]	auto[0]	auto[1]	69114	1			T1	6		T11	2375		T16	706
all_values[7]	auto[1]	auto[1]	auto[1]	68832	1			T1	3		T11	2385		T16	621
all_values[8]	auto[0]	auto[0]	auto[0]	2658173	1			T23	123		T24	21		T25	261
all_values[8]	auto[0]	auto[0]	auto[1]	4662630	1			T24	104		T1	65		T11	161230
all_values[8]	auto[0]	auto[1]	auto[0]	506165	1			T24	12		T1	7		T11	16510
all_values[8]	auto[0]	auto[1]	auto[1]	4625910	1			T24	110		T1	136		T11	164376
all_values[8]	auto[1]	auto[0]	auto[1]	69949	1			T1	5		T11	2485		T16	636
all_values[8]	auto[1]	auto[1]	auto[1]	68552	1			T1	3		T11	2375		T16	672
all_values[9]	auto[0]	auto[0]	auto[0]	2663541	1			T23	123		T24	22		T25	261
all_values[9]	auto[0]	auto[0]	auto[1]	4626532	1			T24	90		T1	135		T11	159597
all_values[9]	auto[0]	auto[1]	auto[0]	502473	1			T24	12		T11	17347		T15	21
all_values[9]	auto[0]	auto[1]	auto[1]	4660957	1			T24	123		T1	57		T11	165930
all_values[9]	auto[1]	auto[0]	auto[1]	68828	1			T1	5		T11	2438		T16	628
all_values[9]	auto[1]	auto[1]	auto[1]	69048	1			T1	2		T11	2342		T16	695
all_values[10]	auto[0]	auto[0]	auto[0]	2666742	1			T23	123		T24	42		T25	261
all_values[10]	auto[0]	auto[0]	auto[1]	4659650	1			T24	57		T1	90		T11	164009
all_values[10]	auto[0]	auto[1]	auto[0]	514062	1			T24	41		T1	6		T11	18769
all_values[10]	auto[0]	auto[1]	auto[1]	4612545	1			T24	107		T1	106		T11	160703
all_values[10]	auto[1]	auto[0]	auto[1]	69223	1			T1	7		T11	2435		T16	678
all_values[10]	auto[1]	auto[1]	auto[1]	69157	1			T1	3		T11	2461		T16	630
all_values[11]	auto[0]	auto[0]	auto[0]	2658151	1			T23	123		T24	38		T25	261
all_values[11]	auto[0]	auto[0]	auto[1]	4659942	1			T24	44		T1	155		T11	166569
all_values[11]	auto[0]	auto[1]	auto[0]	500889	1			T24	37		T11	16879		T15	7
all_values[11]	auto[0]	auto[1]	auto[1]	4634515	1			T24	128		T1	63		T11	159453
all_values[11]	auto[1]	auto[0]	auto[1]	69358	1			T1	6		T11	2271		T16	644
all_values[11]	auto[1]	auto[1]	auto[1]	68524	1			T1	1		T11	2470		T16	643
all_values[12]	auto[0]	auto[0]	auto[0]	2657489	1			T23	123		T24	8		T25	261
all_values[12]	auto[0]	auto[0]	auto[1]	4691636	1			T24	69		T1	69		T11	167981
all_values[12]	auto[0]	auto[1]	auto[0]	501739	1			T24	11		T1	23		T11	15905
all_values[12]	auto[0]	auto[1]	auto[1]	4602395	1			T24	159		T1	101		T11	159232
all_values[12]	auto[1]	auto[0]	auto[1]	69530	1			T1	8		T11	2447		T16	666
all_values[12]	auto[1]	auto[1]	auto[1]	68590	1			T1	2		T11	2361		T16	690
all_values[13]	auto[0]	auto[0]	auto[0]	2665667	1			T23	123		T24	28		T25	261
all_values[13]	auto[0]	auto[0]	auto[1]	4678468	1			T24	109		T1	119		T11	164047
all_values[13]	auto[0]	auto[1]	auto[0]	501361	1			T24	11		T1	8		T11	17517
all_values[13]	auto[0]	auto[1]	auto[1]	4607590	1			T24	99		T1	69		T11	161137
all_values[13]	auto[1]	auto[0]	auto[1]	69579	1			T1	4		T11	2481		T16	678
all_values[13]	auto[1]	auto[1]	auto[1]	68714	1			T1	1		T11	2366		T16	664
all_values[14]	auto[0]	auto[0]	auto[0]	2658432	1			T23	123		T24	23		T25	261
all_values[14]	auto[0]	auto[0]	auto[1]	4644491	1			T24	82		T1	69		T11	166022
all_values[14]	auto[0]	auto[1]	auto[0]	503919	1			T24	11		T1	5		T11	18312
all_values[14]	auto[0]	auto[1]	auto[1]	4646583	1			T24	131		T1	109		T11	158870
all_values[14]	auto[1]	auto[0]	auto[1]	68934	1			T1	4		T11	2394		T16	618
all_values[14]	auto[1]	auto[1]	auto[1]	69020	1			T1	3		T11	2339		T16	668
all_values[15]	auto[0]	auto[0]	auto[0]	2663425	1			T23	123		T24	21		T25	261
all_values[15]	auto[0]	auto[0]	auto[1]	4646425	1			T24	137		T1	109		T11	157654
all_values[15]	auto[0]	auto[1]	auto[0]	509772	1			T24	24		T11	18357		T15	6
all_values[15]	auto[0]	auto[1]	auto[1]	4633356	1			T24	65		T1	96		T11	165014
all_values[15]	auto[1]	auto[0]	auto[1]	69617	1			T1	7		T11	2393		T16	632
all_values[15]	auto[1]	auto[1]	auto[1]	68784	1			T1	1		T11	2479		T16	706
all_values[16]	auto[0]	auto[0]	auto[0]	2666613	1			T23	123		T24	39		T25	261
all_values[16]	auto[0]	auto[0]	auto[1]	4635103	1			T24	114		T1	120		T11	154837
all_values[16]	auto[0]	auto[1]	auto[0]	508035	1			T24	17		T11	20345		T15	11
all_values[16]	auto[0]	auto[1]	auto[1]	4643269	1			T24	77		T1	85		T11	167546
all_values[16]	auto[1]	auto[0]	auto[1]	69327	1			T1	3		T11	2368		T16	651
all_values[16]	auto[1]	auto[1]	auto[1]	69032	1			T1	4		T11	2393		T16	699
all_values[17]	auto[0]	auto[0]	auto[0]	2665707	1			T23	123		T24	12		T25	261
all_values[17]	auto[0]	auto[0]	auto[1]	4646502	1			T24	99		T1	160		T11	165882
all_values[17]	auto[0]	auto[1]	auto[0]	502269	1			T24	28		T11	16341		T15	1
all_values[17]	auto[0]	auto[1]	auto[1]	4638498	1			T24	108		T1	43		T11	160153
all_values[17]	auto[1]	auto[0]	auto[1]	69575	1			T1	10		T11	2490		T16	701
all_values[17]	auto[1]	auto[1]	auto[1]	68828	1			T11	2373		T16	625		T18	515
all_values[18]	auto[0]	auto[0]	auto[0]	2661810	1			T23	123		T24	9		T25	261
all_values[18]	auto[0]	auto[0]	auto[1]	4624908	1			T24	99		T1	153		T11	158899
all_values[18]	auto[0]	auto[1]	auto[0]	494028	1			T24	27		T1	21		T11	17230
all_values[18]	auto[0]	auto[1]	auto[1]	4672517	1			T24	112		T1	40		T11	166100
all_values[18]	auto[1]	auto[0]	auto[1]	68948	1			T1	6		T11	2446		T16	604
all_values[18]	auto[1]	auto[1]	auto[1]	69168	1			T11	2395		T16	697		T18	612
all_values[19]	auto[0]	auto[0]	auto[0]	2655574	1			T23	123		T24	29		T25	261
all_values[19]	auto[0]	auto[0]	auto[1]	4634455	1			T24	45		T1	108		T11	155050
all_values[19]	auto[0]	auto[1]	auto[0]	497597	1			T24	35		T1	4		T11	17317
all_values[19]	auto[0]	auto[1]	auto[1]	4665552	1			T24	138		T1	90		T11	168218
all_values[19]	auto[1]	auto[0]	auto[1]	69395	1			T1	5		T11	2555		T16	673
all_values[19]	auto[1]	auto[1]	auto[1]	68806	1			T1	1		T11	2388		T16	641
all_values[20]	auto[0]	auto[0]	auto[0]	2666142	1			T23	123		T24	41		T25	261
all_values[20]	auto[0]	auto[0]	auto[1]	4672397	1			T24	84		T1	72		T11	163654
all_values[20]	auto[0]	auto[1]	auto[0]	503698	1			T24	33		T1	1		T11	18046
all_values[20]	auto[0]	auto[1]	auto[1]	4611080	1			T24	89		T1	120		T11	161791
all_values[20]	auto[1]	auto[0]	auto[1]	69271	1			T1	6		T11	2459		T16	703
all_values[20]	auto[1]	auto[1]	auto[1]	68791	1			T11	2407		T16	670		T18	530
all_values[21]	auto[0]	auto[0]	auto[0]	2666634	1			T23	123		T24	13		T25	261
all_values[21]	auto[0]	auto[0]	auto[1]	4655516	1			T24	117		T1	124		T11	164138
all_values[21]	auto[0]	auto[1]	auto[0]	504140	1			T24	29		T1	4		T11	16881
all_values[21]	auto[0]	auto[1]	auto[1]	4627528	1			T24	88		T1	75		T11	162713
all_values[21]	auto[1]	auto[0]	auto[1]	68764	1			T1	5		T11	2475		T16	668
all_values[21]	auto[1]	auto[1]	auto[1]	68797	1			T1	2		T11	2410		T16	670
all_values[22]	auto[0]	auto[0]	auto[0]	2661821	1			T23	123		T24	24		T25	261
all_values[22]	auto[0]	auto[0]	auto[1]	4671266	1			T24	97		T1	65		T11	160279
all_values[22]	auto[0]	auto[1]	auto[0]	499695	1			T24	28		T1	5		T11	17442
all_values[22]	auto[0]	auto[1]	auto[1]	4620295	1			T24	98		T1	148		T11	165998
all_values[22]	auto[1]	auto[0]	auto[1]	69696	1			T1	5		T11	2545		T16	686
all_values[22]	auto[1]	auto[1]	auto[1]	68606	1			T11	2356		T16	655		T18	524
all_values[23]	auto[0]	auto[0]	auto[0]	2658430	1			T23	123		T24	36		T25	261
all_values[23]	auto[0]	auto[0]	auto[1]	4636167	1			T24	98		T1	42		T11	166049
all_values[23]	auto[0]	auto[1]	auto[0]	505752	1			T24	55		T11	16344		T15	6
all_values[23]	auto[0]	auto[1]	auto[1]	4652717	1			T24	58		T1	164		T11	160632
all_values[23]	auto[1]	auto[0]	auto[1]	69272	1			T1	6		T11	2419		T16	700
all_values[23]	auto[1]	auto[1]	auto[1]	69041	1			T1	5		T11	2460		T16	659
all_values[24]	auto[0]	auto[0]	auto[0]	2653921	1			T23	123		T24	38		T25	261
all_values[24]	auto[0]	auto[0]	auto[1]	4641062	1			T24	94		T1	153		T11	163083
all_values[24]	auto[0]	auto[1]	auto[0]	499694	1			T24	14		T1	4		T11	17409
all_values[24]	auto[0]	auto[1]	auto[1]	4658699	1			T24	101		T1	47		T11	162558
all_values[24]	auto[1]	auto[0]	auto[1]	69157	1			T1	8		T11	2408		T16	621
all_values[24]	auto[1]	auto[1]	auto[1]	68846	1			T1	1		T11	2370		T16	707
all_values[25]	auto[0]	auto[0]	auto[0]	2667680	1			T23	123		T24	28		T25	261
all_values[25]	auto[0]	auto[0]	auto[1]	4651290	1			T24	115		T1	117		T11	162713
all_values[25]	auto[0]	auto[1]	auto[0]	503139	1			T24	12		T1	11		T11	18558
all_values[25]	auto[0]	auto[1]	auto[1]	4631202	1			T24	92		T1	63		T11	161308
all_values[25]	auto[1]	auto[0]	auto[1]	68981	1			T1	6		T11	2392		T16	678
all_values[25]	auto[1]	auto[1]	auto[1]	69087	1			T11	2463		T16	646		T18	594
all_values[26]	auto[0]	auto[0]	auto[0]	2665684	1			T23	123		T24	42		T25	261
all_values[26]	auto[0]	auto[0]	auto[1]	4641046	1			T24	81		T1	141		T11	167735
all_values[26]	auto[0]	auto[1]	auto[0]	504801	1			T24	21		T1	2		T11	17896
all_values[26]	auto[0]	auto[1]	auto[1]	4641524	1			T24	103		T1	49		T11	156375
all_values[26]	auto[1]	auto[0]	auto[1]	69360	1			T1	7		T11	2540		T16	701
all_values[26]	auto[1]	auto[1]	auto[1]	68964	1			T1	3		T11	2373		T16	627
all_values[27]	auto[0]	auto[0]	auto[0]	2656107	1			T23	123		T24	40		T25	261
all_values[27]	auto[0]	auto[0]	auto[1]	4650648	1			T24	111		T1	125		T11	160044
all_values[27]	auto[0]	auto[1]	auto[0]	506179	1			T24	21		T11	18260		T15	31
all_values[27]	auto[0]	auto[1]	auto[1]	4640719	1			T24	75		T1	88		T11	165186
all_values[27]	auto[1]	auto[0]	auto[1]	68827	1			T1	5		T11	2385		T16	648
all_values[27]	auto[1]	auto[1]	auto[1]	68899	1			T1	3		T11	2472		T16	658
all_values[28]	auto[0]	auto[0]	auto[0]	2666122	1			T23	123		T24	25		T25	261
all_values[28]	auto[0]	auto[0]	auto[1]	4650917	1			T24	95		T1	114		T11	163669
all_values[28]	auto[0]	auto[1]	auto[0]	499734	1			T24	39		T1	1		T11	16235
all_values[28]	auto[0]	auto[1]	auto[1]	4636858	1			T24	88		T1	81		T11	161937
all_values[28]	auto[1]	auto[0]	auto[1]	69020	1			T1	7		T11	2447		T16	627
all_values[28]	auto[1]	auto[1]	auto[1]	68728	1			T1	2		T11	2380		T16	687
all_values[29]	auto[0]	auto[0]	auto[0]	2656774	1			T23	123		T24	13		T25	261
all_values[29]	auto[0]	auto[0]	auto[1]	4650605	1			T24	107		T1	155		T11	165900
all_values[29]	auto[0]	auto[1]	auto[0]	506020	1			T24	36		T1	7		T11	18912
all_values[29]	auto[0]	auto[1]	auto[1]	4640005	1			T24	91		T1	55		T11	158450
all_values[29]	auto[1]	auto[0]	auto[1]	69290	1			T1	4		T11	2474		T16	702
all_values[29]	auto[1]	auto[1]	auto[1]	68685	1			T1	4		T11	2427		T16	657
all_values[30]	auto[0]	auto[0]	auto[0]	2669413	1			T23	123		T24	44		T25	261
all_values[30]	auto[0]	auto[0]	auto[1]	4668964	1			T24	117		T1	91		T11	161489
all_values[30]	auto[0]	auto[1]	auto[0]	510851	1			T24	8		T11	19540		T15	1
all_values[30]	auto[0]	auto[1]	auto[1]	4604395	1			T24	78		T1	92		T11	161001
all_values[30]	auto[1]	auto[0]	auto[1]	69144	1			T1	3		T11	2367		T16	702
all_values[30]	auto[1]	auto[1]	auto[1]	68612	1			T1	5		T11	2406		T16	628
all_values[31]	auto[0]	auto[0]	auto[0]	2662344	1			T23	123		T24	17		T25	261
all_values[31]	auto[0]	auto[0]	auto[1]	4641752	1			T24	97		T1	77		T11	159105
all_values[31]	auto[0]	auto[1]	auto[0]	503289	1			T24	26		T11	18166		T15	4
all_values[31]	auto[0]	auto[1]	auto[1]	4646009	1			T24	107		T1	128		T11	164513
all_values[31]	auto[1]	auto[0]	auto[1]	69295	1			T1	6		T11	2436		T16	712
all_values[31]	auto[1]	auto[1]	auto[1]	68690	1			T1	5		T11	2472		T16	659

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal