Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7378799 |
1 |
|
|
T23 |
123 |
|
T24 |
162 |
|
T25 |
261 |
| auto[1] |
5212580 |
1 |
|
|
T24 |
85 |
|
T1 |
125 |
|
T11 |
185096 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10419823 |
1 |
|
|
T23 |
123 |
|
T24 |
169 |
|
T25 |
261 |
| auto[1] |
2171556 |
1 |
|
|
T24 |
78 |
|
T1 |
115 |
|
T11 |
69249 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7380907 |
1 |
|
|
T23 |
123 |
|
T24 |
126 |
|
T25 |
261 |
| auto[1] |
5210472 |
1 |
|
|
T24 |
121 |
|
T1 |
132 |
|
T11 |
185374 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1521037 |
1 |
|
|
T24 |
38 |
|
T1 |
11 |
|
T11 |
57583 |
| auto[1] |
auto[0] |
auto[1] |
1091166 |
1 |
|
|
T24 |
48 |
|
T1 |
40 |
|
T11 |
34335 |
| auto[1] |
auto[1] |
auto[0] |
1517879 |
1 |
|
|
T24 |
5 |
|
T1 |
6 |
|
T11 |
58542 |
| auto[1] |
auto[1] |
auto[1] |
1080390 |
1 |
|
|
T24 |
30 |
|
T1 |
75 |
|
T11 |
34914 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |