Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7770199 |
1 |
|
|
T23 |
1 |
|
T24 |
99 |
|
T25 |
56919 |
| auto[1] |
5876364 |
1 |
|
|
T24 |
22 |
|
T25 |
47243 |
|
T26 |
1862 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11204893 |
1 |
|
|
T23 |
1 |
|
T24 |
110 |
|
T25 |
76256 |
| auto[1] |
2441670 |
1 |
|
|
T24 |
11 |
|
T25 |
27906 |
|
T26 |
826 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7802107 |
1 |
|
|
T23 |
1 |
|
T24 |
107 |
|
T25 |
58287 |
| auto[1] |
5844456 |
1 |
|
|
T24 |
14 |
|
T25 |
45875 |
|
T26 |
1594 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1694101 |
1 |
|
|
T24 |
3 |
|
T25 |
9089 |
|
T26 |
348 |
| auto[1] |
auto[0] |
auto[1] |
1219956 |
1 |
|
|
T24 |
7 |
|
T25 |
13991 |
|
T26 |
383 |
| auto[1] |
auto[1] |
auto[0] |
1708685 |
1 |
|
|
T25 |
8880 |
|
T26 |
420 |
|
T29 |
38579 |
| auto[1] |
auto[1] |
auto[1] |
1221714 |
1 |
|
|
T24 |
4 |
|
T25 |
13915 |
|
T26 |
443 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |