Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7790248 |
1 |
|
|
T23 |
1 |
|
T24 |
109 |
|
T25 |
59827 |
| auto[1] |
5856315 |
1 |
|
|
T24 |
12 |
|
T25 |
44335 |
|
T26 |
1829 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11214103 |
1 |
|
|
T23 |
1 |
|
T24 |
115 |
|
T25 |
74262 |
| auto[1] |
2432460 |
1 |
|
|
T24 |
6 |
|
T25 |
29900 |
|
T26 |
808 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7813613 |
1 |
|
|
T23 |
1 |
|
T24 |
101 |
|
T25 |
56403 |
| auto[1] |
5832950 |
1 |
|
|
T24 |
20 |
|
T25 |
47759 |
|
T26 |
1631 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1699199 |
1 |
|
|
T24 |
12 |
|
T25 |
9502 |
|
T26 |
363 |
| auto[1] |
auto[0] |
auto[1] |
1217622 |
1 |
|
|
T24 |
6 |
|
T25 |
15993 |
|
T26 |
343 |
| auto[1] |
auto[1] |
auto[0] |
1701291 |
1 |
|
|
T24 |
2 |
|
T25 |
8357 |
|
T26 |
460 |
| auto[1] |
auto[1] |
auto[1] |
1214838 |
1 |
|
|
T25 |
13907 |
|
T26 |
465 |
|
T29 |
23254 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |