Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7815887 |
1 |
|
|
T23 |
1 |
|
T24 |
109 |
|
T25 |
56648 |
| auto[1] |
5830676 |
1 |
|
|
T24 |
12 |
|
T25 |
47514 |
|
T26 |
1280 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11209046 |
1 |
|
|
T23 |
1 |
|
T24 |
110 |
|
T25 |
75508 |
| auto[1] |
2437517 |
1 |
|
|
T24 |
11 |
|
T25 |
28654 |
|
T26 |
791 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7807172 |
1 |
|
|
T23 |
1 |
|
T24 |
103 |
|
T25 |
57973 |
| auto[1] |
5839391 |
1 |
|
|
T24 |
18 |
|
T25 |
46189 |
|
T26 |
1638 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1716812 |
1 |
|
|
T24 |
7 |
|
T25 |
8873 |
|
T26 |
509 |
| auto[1] |
auto[0] |
auto[1] |
1230216 |
1 |
|
|
T24 |
5 |
|
T25 |
14909 |
|
T26 |
468 |
| auto[1] |
auto[1] |
auto[0] |
1685062 |
1 |
|
|
T25 |
8662 |
|
T26 |
338 |
|
T29 |
37239 |
| auto[1] |
auto[1] |
auto[1] |
1207301 |
1 |
|
|
T24 |
6 |
|
T25 |
13745 |
|
T26 |
323 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |