Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7797508 |
1 |
|
|
T23 |
1 |
|
T24 |
103 |
|
T25 |
59740 |
| auto[1] |
5849055 |
1 |
|
|
T24 |
18 |
|
T25 |
44422 |
|
T26 |
1877 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12890091 |
1 |
|
|
T23 |
1 |
|
T24 |
121 |
|
T25 |
98119 |
| auto[1] |
756472 |
1 |
|
|
T25 |
6043 |
|
T26 |
310 |
|
T29 |
15930 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7758344 |
1 |
|
|
T23 |
1 |
|
T24 |
102 |
|
T25 |
56270 |
| auto[1] |
5888219 |
1 |
|
|
T24 |
19 |
|
T25 |
47892 |
|
T26 |
1606 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2573448 |
1 |
|
|
T24 |
14 |
|
T25 |
22071 |
|
T26 |
562 |
| auto[1] |
auto[0] |
auto[1] |
380144 |
1 |
|
|
T25 |
3201 |
|
T26 |
129 |
|
T29 |
7436 |
| auto[1] |
auto[1] |
auto[0] |
2558299 |
1 |
|
|
T24 |
5 |
|
T25 |
19778 |
|
T26 |
734 |
| auto[1] |
auto[1] |
auto[1] |
376328 |
1 |
|
|
T25 |
2842 |
|
T26 |
181 |
|
T29 |
8494 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |