Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7770493 |
1 |
|
|
T23 |
1 |
|
T24 |
109 |
|
T25 |
57771 |
| auto[1] |
5876070 |
1 |
|
|
T24 |
12 |
|
T25 |
46391 |
|
T26 |
2033 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12894048 |
1 |
|
|
T23 |
1 |
|
T24 |
120 |
|
T25 |
98323 |
| auto[1] |
752515 |
1 |
|
|
T24 |
1 |
|
T25 |
5839 |
|
T26 |
281 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7794929 |
1 |
|
|
T23 |
1 |
|
T24 |
96 |
|
T25 |
56648 |
| auto[1] |
5851634 |
1 |
|
|
T24 |
25 |
|
T25 |
47514 |
|
T26 |
1461 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2545189 |
1 |
|
|
T24 |
21 |
|
T25 |
21687 |
|
T26 |
476 |
| auto[1] |
auto[0] |
auto[1] |
374987 |
1 |
|
|
T24 |
1 |
|
T25 |
3008 |
|
T26 |
118 |
| auto[1] |
auto[1] |
auto[0] |
2553930 |
1 |
|
|
T24 |
3 |
|
T25 |
19988 |
|
T26 |
704 |
| auto[1] |
auto[1] |
auto[1] |
377528 |
1 |
|
|
T25 |
2831 |
|
T26 |
163 |
|
T29 |
8104 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |