cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57444 |
1 |
|
|
T20 |
2856 |
|
T37 |
507 |
|
T114 |
444 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46899 |
1 |
|
|
T20 |
1155 |
|
T37 |
1738 |
|
T114 |
432 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54081 |
1 |
|
|
T20 |
1631 |
|
T37 |
891 |
|
T114 |
1646 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49940 |
1 |
|
|
T20 |
1088 |
|
T37 |
627 |
|
T114 |
238 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T20 |
50 |
|
T37 |
30 |
|
T114 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T20 |
50 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T20 |
49 |
|
T37 |
30 |
|
T114 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T20 |
49 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T20 |
48 |
|
T37 |
30 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T20 |
48 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T20 |
48 |
|
T37 |
30 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T20 |
48 |
|
T37 |
24 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T20 |
46 |
|
T37 |
30 |
|
T114 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
47 |
|
T37 |
23 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T20 |
44 |
|
T37 |
29 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T20 |
47 |
|
T37 |
21 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T20 |
44 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T20 |
47 |
|
T37 |
20 |
|
T114 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T20 |
44 |
|
T37 |
27 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T20 |
46 |
|
T37 |
19 |
|
T114 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
29 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T20 |
43 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T20 |
45 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
29 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T20 |
42 |
|
T37 |
26 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T20 |
45 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
29 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T20 |
41 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T20 |
43 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
29 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T20 |
39 |
|
T37 |
25 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T20 |
41 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
28 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T20 |
39 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T20 |
41 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
28 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T20 |
36 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T20 |
40 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
28 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T20 |
36 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
28 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T20 |
40 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54545 |
1 |
|
|
T20 |
1722 |
|
T37 |
815 |
|
T114 |
374 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48642 |
1 |
|
|
T20 |
2078 |
|
T37 |
456 |
|
T114 |
352 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55112 |
1 |
|
|
T20 |
1630 |
|
T37 |
2069 |
|
T114 |
1653 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50172 |
1 |
|
|
T20 |
1146 |
|
T37 |
425 |
|
T114 |
413 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T20 |
58 |
|
T37 |
27 |
|
T114 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T20 |
58 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T20 |
58 |
|
T37 |
26 |
|
T114 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T20 |
58 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T20 |
58 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T20 |
53 |
|
T37 |
25 |
|
T114 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T20 |
56 |
|
T37 |
25 |
|
T114 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
53 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T20 |
56 |
|
T37 |
25 |
|
T114 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T20 |
52 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T20 |
56 |
|
T37 |
25 |
|
T114 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T20 |
52 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T20 |
50 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T20 |
53 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T20 |
48 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T20 |
48 |
|
T37 |
24 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T20 |
47 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T20 |
51 |
|
T37 |
20 |
|
T114 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T20 |
47 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T20 |
48 |
|
T37 |
20 |
|
T114 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T20 |
46 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T20 |
45 |
|
T37 |
18 |
|
T114 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T20 |
44 |
|
T37 |
20 |
|
T114 |
15 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60184 |
1 |
|
|
T20 |
1806 |
|
T37 |
1764 |
|
T114 |
2059 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46726 |
1 |
|
|
T20 |
1039 |
|
T37 |
691 |
|
T114 |
257 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56427 |
1 |
|
|
T20 |
1641 |
|
T37 |
527 |
|
T114 |
323 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45807 |
1 |
|
|
T20 |
2268 |
|
T37 |
744 |
|
T114 |
188 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T20 |
50 |
|
T37 |
37 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T20 |
53 |
|
T37 |
32 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T20 |
48 |
|
T37 |
36 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T20 |
53 |
|
T37 |
31 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T20 |
47 |
|
T37 |
35 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T20 |
53 |
|
T37 |
31 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T20 |
45 |
|
T37 |
35 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T20 |
49 |
|
T37 |
31 |
|
T114 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T20 |
45 |
|
T37 |
33 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T20 |
46 |
|
T37 |
31 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T20 |
45 |
|
T37 |
33 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T20 |
42 |
|
T37 |
30 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T20 |
43 |
|
T37 |
31 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T20 |
41 |
|
T37 |
29 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
30 |
|
T37 |
6 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T20 |
43 |
|
T37 |
31 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T20 |
40 |
|
T37 |
27 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
30 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T20 |
43 |
|
T37 |
31 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T20 |
40 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
30 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T20 |
43 |
|
T37 |
31 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T20 |
40 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
30 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T20 |
43 |
|
T37 |
29 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T20 |
39 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
30 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T20 |
42 |
|
T37 |
29 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T20 |
37 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
29 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T20 |
41 |
|
T37 |
29 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T20 |
37 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
29 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T20 |
40 |
|
T37 |
28 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T20 |
37 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
29 |
|
T37 |
5 |
|
T114 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T20 |
40 |
|
T37 |
27 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T20 |
37 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57189 |
1 |
|
|
T20 |
1212 |
|
T37 |
1720 |
|
T114 |
1620 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48335 |
1 |
|
|
T20 |
1210 |
|
T37 |
597 |
|
T114 |
461 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55355 |
1 |
|
|
T20 |
1789 |
|
T37 |
1076 |
|
T114 |
410 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48700 |
1 |
|
|
T20 |
2494 |
|
T37 |
438 |
|
T114 |
348 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T20 |
57 |
|
T37 |
28 |
|
T114 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T20 |
53 |
|
T37 |
23 |
|
T114 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T20 |
57 |
|
T37 |
27 |
|
T114 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T20 |
56 |
|
T37 |
27 |
|
T114 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T20 |
51 |
|
T37 |
22 |
|
T114 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T20 |
55 |
|
T37 |
24 |
|
T114 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T20 |
49 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T20 |
54 |
|
T37 |
24 |
|
T114 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T20 |
48 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T20 |
54 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T20 |
47 |
|
T37 |
20 |
|
T114 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T20 |
54 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T20 |
45 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T20 |
51 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T20 |
44 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T20 |
50 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T20 |
43 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T20 |
49 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T20 |
47 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T20 |
41 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T20 |
44 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T20 |
40 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
43 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T20 |
40 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T20 |
41 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T20 |
39 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57688 |
1 |
|
|
T20 |
1755 |
|
T37 |
784 |
|
T114 |
596 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45865 |
1 |
|
|
T20 |
2241 |
|
T37 |
570 |
|
T114 |
1658 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60105 |
1 |
|
|
T20 |
1585 |
|
T37 |
1640 |
|
T114 |
423 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45528 |
1 |
|
|
T20 |
1103 |
|
T37 |
669 |
|
T114 |
142 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T20 |
55 |
|
T37 |
31 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T20 |
57 |
|
T37 |
32 |
|
T114 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T20 |
55 |
|
T37 |
31 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T20 |
57 |
|
T37 |
31 |
|
T114 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T20 |
54 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T20 |
56 |
|
T37 |
30 |
|
T114 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T20 |
51 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T20 |
56 |
|
T37 |
30 |
|
T114 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T20 |
51 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T20 |
54 |
|
T37 |
30 |
|
T114 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T20 |
50 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T20 |
52 |
|
T37 |
29 |
|
T114 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T20 |
50 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T20 |
50 |
|
T37 |
29 |
|
T114 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T20 |
49 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T20 |
50 |
|
T37 |
29 |
|
T114 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T20 |
48 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T20 |
49 |
|
T37 |
29 |
|
T114 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T20 |
47 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T20 |
45 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T20 |
48 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
26 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T20 |
48 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
47 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T20 |
47 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T20 |
25 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T20 |
40 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T20 |
45 |
|
T37 |
25 |
|
T114 |
7 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59199 |
1 |
|
|
T20 |
2783 |
|
T37 |
984 |
|
T114 |
655 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48074 |
1 |
|
|
T20 |
1086 |
|
T37 |
505 |
|
T114 |
281 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56243 |
1 |
|
|
T20 |
1587 |
|
T37 |
775 |
|
T114 |
1625 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45805 |
1 |
|
|
T20 |
1145 |
|
T37 |
1544 |
|
T114 |
207 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T20 |
64 |
|
T37 |
20 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T20 |
64 |
|
T37 |
21 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T20 |
61 |
|
T37 |
18 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T20 |
64 |
|
T37 |
21 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T20 |
60 |
|
T37 |
18 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T20 |
62 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T20 |
58 |
|
T37 |
18 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T20 |
61 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T20 |
57 |
|
T37 |
17 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T20 |
59 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T20 |
54 |
|
T37 |
16 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T20 |
58 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T20 |
50 |
|
T37 |
16 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T20 |
58 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
24 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T20 |
48 |
|
T37 |
15 |
|
T114 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T20 |
56 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T20 |
47 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T20 |
55 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T20 |
46 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T20 |
54 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T20 |
45 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T20 |
53 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T20 |
45 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T20 |
51 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T20 |
42 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T20 |
50 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T20 |
41 |
|
T37 |
16 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T20 |
49 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T20 |
24 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T20 |
41 |
|
T37 |
15 |
|
T114 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T20 |
49 |
|
T37 |
17 |
|
T114 |
9 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60777 |
1 |
|
|
T20 |
1494 |
|
T37 |
660 |
|
T114 |
1635 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44155 |
1 |
|
|
T20 |
1227 |
|
T37 |
689 |
|
T114 |
429 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59946 |
1 |
|
|
T20 |
2427 |
|
T37 |
1513 |
|
T114 |
336 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44869 |
1 |
|
|
T20 |
1459 |
|
T37 |
727 |
|
T114 |
412 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T20 |
65 |
|
T37 |
41 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T20 |
66 |
|
T37 |
37 |
|
T114 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T20 |
64 |
|
T37 |
40 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T20 |
65 |
|
T37 |
36 |
|
T114 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T20 |
62 |
|
T37 |
39 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T20 |
64 |
|
T37 |
36 |
|
T114 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T20 |
58 |
|
T37 |
39 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T20 |
62 |
|
T37 |
36 |
|
T114 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T20 |
58 |
|
T37 |
37 |
|
T114 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T20 |
60 |
|
T37 |
36 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T20 |
58 |
|
T37 |
36 |
|
T114 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T20 |
60 |
|
T37 |
36 |
|
T114 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T20 |
55 |
|
T37 |
35 |
|
T114 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T20 |
60 |
|
T37 |
36 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T20 |
53 |
|
T37 |
35 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T20 |
57 |
|
T37 |
34 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T20 |
50 |
|
T37 |
35 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T20 |
57 |
|
T37 |
33 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T20 |
50 |
|
T37 |
35 |
|
T114 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T20 |
55 |
|
T37 |
33 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T20 |
48 |
|
T37 |
35 |
|
T114 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T20 |
53 |
|
T37 |
31 |
|
T114 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
22 |
|
T37 |
6 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T20 |
46 |
|
T37 |
33 |
|
T114 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T20 |
52 |
|
T37 |
31 |
|
T114 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T20 |
21 |
|
T37 |
5 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T20 |
45 |
|
T37 |
31 |
|
T114 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T20 |
51 |
|
T37 |
30 |
|
T114 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T20 |
21 |
|
T37 |
5 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T20 |
44 |
|
T37 |
30 |
|
T114 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T20 |
51 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T20 |
21 |
|
T37 |
5 |
|
T114 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T20 |
41 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T20 |
49 |
|
T37 |
27 |
|
T114 |
14 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60789 |
1 |
|
|
T20 |
2765 |
|
T37 |
670 |
|
T114 |
1750 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43333 |
1 |
|
|
T20 |
1361 |
|
T37 |
616 |
|
T114 |
182 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56776 |
1 |
|
|
T20 |
999 |
|
T37 |
783 |
|
T114 |
468 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48844 |
1 |
|
|
T20 |
1497 |
|
T37 |
1731 |
|
T114 |
574 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T20 |
61 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T20 |
65 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T20 |
61 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
65 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T20 |
61 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T20 |
65 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
63 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T20 |
58 |
|
T37 |
27 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T20 |
63 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T20 |
56 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T20 |
61 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T20 |
56 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T20 |
60 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T20 |
60 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T20 |
52 |
|
T37 |
26 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T20 |
58 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T20 |
51 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T20 |
57 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T20 |
49 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T20 |
49 |
|
T37 |
24 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T20 |
51 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T20 |
42 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T20 |
50 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T20 |
42 |
|
T37 |
22 |
|
T114 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
18 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56735 |
1 |
|
|
T20 |
1777 |
|
T37 |
1758 |
|
T114 |
282 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48541 |
1 |
|
|
T20 |
1302 |
|
T37 |
434 |
|
T114 |
262 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56254 |
1 |
|
|
T20 |
1391 |
|
T37 |
1029 |
|
T114 |
481 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47926 |
1 |
|
|
T20 |
2236 |
|
T37 |
602 |
|
T114 |
1697 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T20 |
59 |
|
T37 |
22 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T20 |
55 |
|
T37 |
21 |
|
T114 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T20 |
59 |
|
T37 |
21 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T20 |
54 |
|
T37 |
21 |
|
T114 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T20 |
58 |
|
T37 |
21 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T20 |
57 |
|
T37 |
21 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T20 |
51 |
|
T37 |
21 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T20 |
55 |
|
T37 |
20 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T20 |
51 |
|
T37 |
21 |
|
T114 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T20 |
54 |
|
T37 |
20 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T20 |
51 |
|
T37 |
21 |
|
T114 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T20 |
53 |
|
T37 |
20 |
|
T114 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T20 |
50 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T20 |
50 |
|
T37 |
20 |
|
T114 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T20 |
49 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T20 |
50 |
|
T37 |
19 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T20 |
47 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T20 |
46 |
|
T37 |
18 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T20 |
47 |
|
T37 |
19 |
|
T114 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T20 |
45 |
|
T37 |
18 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T20 |
46 |
|
T37 |
18 |
|
T114 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T20 |
44 |
|
T37 |
18 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T20 |
44 |
|
T37 |
18 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T20 |
43 |
|
T37 |
18 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T20 |
44 |
|
T37 |
17 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T20 |
25 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T20 |
43 |
|
T37 |
16 |
|
T114 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
22 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
16 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60634 |
1 |
|
|
T20 |
2656 |
|
T37 |
747 |
|
T114 |
498 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44031 |
1 |
|
|
T20 |
1495 |
|
T37 |
1582 |
|
T114 |
269 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59987 |
1 |
|
|
T20 |
1421 |
|
T37 |
864 |
|
T114 |
1784 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47256 |
1 |
|
|
T20 |
1264 |
|
T37 |
539 |
|
T114 |
308 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T20 |
53 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T20 |
52 |
|
T37 |
30 |
|
T114 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T20 |
53 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T20 |
49 |
|
T37 |
30 |
|
T114 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T20 |
53 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T20 |
53 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T20 |
53 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T20 |
48 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T20 |
53 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T20 |
48 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T20 |
50 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T20 |
46 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T20 |
50 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T20 |
46 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T20 |
50 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
45 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T20 |
47 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T20 |
43 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
45 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T20 |
43 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T20 |
45 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T20 |
43 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T20 |
40 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T20 |
43 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T20 |
39 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T20 |
38 |
|
T37 |
22 |
|
T114 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T20 |
43 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54510 |
1 |
|
|
T20 |
1126 |
|
T37 |
506 |
|
T114 |
342 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46606 |
1 |
|
|
T20 |
1033 |
|
T37 |
1761 |
|
T114 |
259 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59096 |
1 |
|
|
T20 |
3106 |
|
T37 |
842 |
|
T114 |
1777 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50011 |
1 |
|
|
T20 |
1557 |
|
T37 |
632 |
|
T114 |
526 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T20 |
55 |
|
T37 |
32 |
|
T114 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T20 |
54 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T20 |
54 |
|
T37 |
31 |
|
T114 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T20 |
54 |
|
T37 |
27 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T20 |
52 |
|
T37 |
30 |
|
T114 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T20 |
52 |
|
T37 |
29 |
|
T114 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T20 |
52 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T20 |
53 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T20 |
51 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T20 |
53 |
|
T37 |
22 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T20 |
48 |
|
T37 |
27 |
|
T114 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T20 |
53 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T20 |
46 |
|
T37 |
26 |
|
T114 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T20 |
46 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T20 |
44 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T20 |
43 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T20 |
49 |
|
T37 |
21 |
|
T114 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T20 |
43 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T20 |
48 |
|
T37 |
20 |
|
T114 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
42 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T20 |
47 |
|
T37 |
20 |
|
T114 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T20 |
40 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T20 |
46 |
|
T37 |
19 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T20 |
39 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T20 |
45 |
|
T37 |
19 |
|
T114 |
8 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53614 |
1 |
|
|
T20 |
1068 |
|
T37 |
1942 |
|
T114 |
1788 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46756 |
1 |
|
|
T20 |
1265 |
|
T37 |
610 |
|
T114 |
398 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56673 |
1 |
|
|
T20 |
1114 |
|
T37 |
573 |
|
T114 |
359 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52336 |
1 |
|
|
T20 |
2811 |
|
T37 |
639 |
|
T114 |
380 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T20 |
80 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T20 |
82 |
|
T37 |
32 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T20 |
78 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T20 |
81 |
|
T37 |
30 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T20 |
76 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T20 |
81 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T20 |
76 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T20 |
80 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T20 |
73 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T20 |
80 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T20 |
72 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T20 |
79 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T20 |
69 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T20 |
78 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
14 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T20 |
67 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T20 |
74 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T20 |
66 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T20 |
72 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T20 |
63 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T20 |
72 |
|
T37 |
24 |
|
T114 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T20 |
60 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T20 |
67 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T20 |
64 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T20 |
52 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T20 |
63 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T20 |
47 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T20 |
63 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
20 |
|
T37 |
13 |
|
T114 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T20 |
47 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T20 |
63 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55951 |
1 |
|
|
T20 |
1459 |
|
T37 |
1066 |
|
T114 |
415 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47008 |
1 |
|
|
T20 |
1260 |
|
T37 |
1636 |
|
T114 |
256 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65174 |
1 |
|
|
T20 |
1724 |
|
T37 |
769 |
|
T114 |
1943 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42027 |
1 |
|
|
T20 |
2229 |
|
T37 |
335 |
|
T114 |
285 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T20 |
61 |
|
T37 |
25 |
|
T114 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T20 |
56 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T20 |
58 |
|
T37 |
25 |
|
T114 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T20 |
56 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T20 |
56 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T20 |
54 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T20 |
55 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T20 |
54 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T20 |
55 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T20 |
51 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T20 |
48 |
|
T37 |
17 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T20 |
48 |
|
T37 |
17 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T20 |
22 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T20 |
48 |
|
T37 |
17 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T20 |
47 |
|
T37 |
16 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T20 |
47 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T20 |
51 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T20 |
45 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T20 |
50 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T20 |
44 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
21 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T20 |
47 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T20 |
44 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
21 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T20 |
45 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T20 |
41 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
21 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T20 |
40 |
|
T37 |
13 |
|
T114 |
11 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56958 |
1 |
|
|
T20 |
2377 |
|
T37 |
1883 |
|
T114 |
362 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44113 |
1 |
|
|
T20 |
1692 |
|
T37 |
583 |
|
T114 |
1791 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59058 |
1 |
|
|
T20 |
1463 |
|
T37 |
665 |
|
T114 |
437 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49694 |
1 |
|
|
T20 |
1091 |
|
T37 |
568 |
|
T114 |
280 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T20 |
64 |
|
T37 |
32 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T20 |
65 |
|
T37 |
33 |
|
T114 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T20 |
64 |
|
T37 |
32 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T20 |
64 |
|
T37 |
33 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T20 |
63 |
|
T37 |
32 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
64 |
|
T37 |
33 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T20 |
61 |
|
T37 |
31 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T20 |
60 |
|
T37 |
31 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T20 |
61 |
|
T37 |
31 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T20 |
60 |
|
T37 |
31 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T20 |
58 |
|
T37 |
28 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T20 |
60 |
|
T37 |
30 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T20 |
55 |
|
T37 |
27 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T20 |
60 |
|
T37 |
30 |
|
T114 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T20 |
54 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T20 |
60 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T20 |
49 |
|
T37 |
24 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T20 |
58 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T20 |
57 |
|
T37 |
26 |
|
T114 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T20 |
45 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
20 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T20 |
42 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
20 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T20 |
41 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
20 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
19 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T20 |
39 |
|
T37 |
22 |
|
T114 |
14 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56985 |
1 |
|
|
T20 |
2249 |
|
T37 |
610 |
|
T114 |
1846 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42345 |
1 |
|
|
T20 |
1329 |
|
T37 |
803 |
|
T114 |
187 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62207 |
1 |
|
|
T20 |
1352 |
|
T37 |
1827 |
|
T114 |
709 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48380 |
1 |
|
|
T20 |
1622 |
|
T37 |
512 |
|
T114 |
188 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T20 |
70 |
|
T37 |
30 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T20 |
70 |
|
T37 |
33 |
|
T114 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T20 |
66 |
|
T37 |
29 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T20 |
68 |
|
T37 |
31 |
|
T114 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T20 |
65 |
|
T37 |
29 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T20 |
65 |
|
T37 |
31 |
|
T114 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T20 |
65 |
|
T37 |
28 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T20 |
64 |
|
T37 |
31 |
|
T114 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T20 |
64 |
|
T37 |
27 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T20 |
64 |
|
T37 |
30 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T20 |
62 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T20 |
63 |
|
T37 |
29 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T20 |
61 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T20 |
62 |
|
T37 |
28 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
19 |
|
T37 |
12 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T20 |
59 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T20 |
61 |
|
T37 |
28 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
19 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T20 |
59 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T20 |
61 |
|
T37 |
27 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
19 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T20 |
56 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T20 |
58 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T20 |
19 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T20 |
54 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T20 |
57 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T20 |
19 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T20 |
54 |
|
T37 |
26 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T20 |
56 |
|
T37 |
22 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
18 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T20 |
53 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T20 |
55 |
|
T37 |
21 |
|
T114 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
18 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T20 |
55 |
|
T37 |
21 |
|
T114 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T20 |
18 |
|
T37 |
11 |
|
T114 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T20 |
18 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T20 |
53 |
|
T37 |
19 |
|
T114 |
5 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60222 |
1 |
|
|
T20 |
2983 |
|
T37 |
764 |
|
T114 |
487 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45965 |
1 |
|
|
T20 |
890 |
|
T37 |
1779 |
|
T114 |
374 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61544 |
1 |
|
|
T20 |
1980 |
|
T37 |
771 |
|
T114 |
1866 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43886 |
1 |
|
|
T20 |
1136 |
|
T37 |
485 |
|
T114 |
211 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T20 |
45 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T20 |
43 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T20 |
42 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T20 |
41 |
|
T37 |
22 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T20 |
42 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T20 |
41 |
|
T37 |
22 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T20 |
42 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T20 |
41 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T20 |
40 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T20 |
39 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T20 |
37 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T20 |
37 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
27 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T20 |
36 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T20 |
36 |
|
T37 |
18 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T20 |
27 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T20 |
36 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T20 |
34 |
|
T37 |
18 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T20 |
27 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T20 |
36 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T20 |
32 |
|
T37 |
18 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
27 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T20 |
36 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T20 |
31 |
|
T37 |
18 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
27 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T20 |
35 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
31 |
|
T37 |
18 |
|
T114 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T20 |
26 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T20 |
35 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T20 |
30 |
|
T37 |
18 |
|
T114 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T20 |
26 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T20 |
35 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T20 |
30 |
|
T37 |
18 |
|
T114 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T20 |
26 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T20 |
33 |
|
T37 |
23 |
|
T114 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T20 |
29 |
|
T37 |
17 |
|
T114 |
5 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58986 |
1 |
|
|
T20 |
1853 |
|
T37 |
826 |
|
T114 |
390 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48253 |
1 |
|
|
T20 |
1074 |
|
T37 |
423 |
|
T114 |
496 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58342 |
1 |
|
|
T20 |
1733 |
|
T37 |
2199 |
|
T114 |
1773 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44657 |
1 |
|
|
T20 |
2214 |
|
T37 |
459 |
|
T114 |
222 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T20 |
55 |
|
T37 |
24 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T20 |
55 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T20 |
53 |
|
T37 |
22 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T20 |
53 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T20 |
49 |
|
T37 |
21 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T20 |
48 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T20 |
47 |
|
T37 |
21 |
|
T114 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T20 |
46 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T20 |
47 |
|
T37 |
21 |
|
T114 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T20 |
45 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T20 |
47 |
|
T37 |
20 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T20 |
44 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T20 |
46 |
|
T37 |
19 |
|
T114 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T20 |
44 |
|
T37 |
17 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T20 |
43 |
|
T37 |
17 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T20 |
42 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T20 |
42 |
|
T37 |
16 |
|
T114 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T20 |
40 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T20 |
42 |
|
T37 |
14 |
|
T114 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T20 |
37 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T20 |
42 |
|
T37 |
14 |
|
T114 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T20 |
36 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T20 |
42 |
|
T37 |
14 |
|
T114 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T20 |
36 |
|
T37 |
19 |
|
T114 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
22 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T20 |
40 |
|
T37 |
14 |
|
T114 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T20 |
23 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T20 |
36 |
|
T37 |
19 |
|
T114 |
11 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61336 |
1 |
|
|
T20 |
1436 |
|
T37 |
1955 |
|
T114 |
288 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43953 |
1 |
|
|
T20 |
2276 |
|
T37 |
646 |
|
T114 |
358 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55619 |
1 |
|
|
T20 |
1620 |
|
T37 |
751 |
|
T114 |
621 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49156 |
1 |
|
|
T20 |
1265 |
|
T37 |
482 |
|
T114 |
1575 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T20 |
57 |
|
T37 |
28 |
|
T114 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T20 |
55 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T20 |
57 |
|
T37 |
27 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T20 |
57 |
|
T37 |
27 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T20 |
53 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T20 |
57 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T20 |
53 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T20 |
55 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T20 |
50 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T20 |
54 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T20 |
53 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T20 |
51 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T20 |
46 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T20 |
51 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T20 |
46 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T20 |
50 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T20 |
49 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T20 |
49 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T20 |
44 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
27 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T20 |
47 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T20 |
43 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
27 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T20 |
40 |
|
T37 |
21 |
|
T114 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
27 |
|
T37 |
9 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
28 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T20 |
38 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58002 |
1 |
|
|
T20 |
1828 |
|
T37 |
1218 |
|
T114 |
561 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48929 |
1 |
|
|
T20 |
1135 |
|
T37 |
1463 |
|
T114 |
243 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58201 |
1 |
|
|
T20 |
2912 |
|
T37 |
648 |
|
T114 |
1858 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44084 |
1 |
|
|
T20 |
819 |
|
T37 |
594 |
|
T114 |
193 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T20 |
53 |
|
T37 |
19 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T20 |
52 |
|
T37 |
21 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T20 |
50 |
|
T37 |
18 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T20 |
52 |
|
T37 |
20 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T20 |
49 |
|
T37 |
17 |
|
T114 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T20 |
52 |
|
T37 |
20 |
|
T114 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T20 |
48 |
|
T37 |
17 |
|
T114 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T20 |
50 |
|
T37 |
20 |
|
T114 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T20 |
47 |
|
T37 |
16 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T20 |
49 |
|
T37 |
20 |
|
T114 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T20 |
47 |
|
T37 |
16 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T20 |
49 |
|
T37 |
19 |
|
T114 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T20 |
47 |
|
T37 |
16 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T20 |
28 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T20 |
48 |
|
T37 |
18 |
|
T114 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T20 |
46 |
|
T37 |
16 |
|
T114 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T20 |
47 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T20 |
45 |
|
T37 |
16 |
|
T114 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T20 |
46 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T20 |
44 |
|
T37 |
16 |
|
T114 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T20 |
45 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T20 |
44 |
|
T37 |
16 |
|
T114 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T20 |
45 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T20 |
42 |
|
T37 |
16 |
|
T114 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T20 |
44 |
|
T37 |
18 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T20 |
40 |
|
T37 |
16 |
|
T114 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T20 |
38 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T20 |
28 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T20 |
38 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T20 |
27 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T20 |
38 |
|
T37 |
16 |
|
T114 |
7 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57638 |
1 |
|
|
T20 |
1538 |
|
T37 |
851 |
|
T114 |
476 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43747 |
1 |
|
|
T20 |
2493 |
|
T37 |
1691 |
|
T114 |
246 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58867 |
1 |
|
|
T20 |
1566 |
|
T37 |
607 |
|
T114 |
516 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48993 |
1 |
|
|
T20 |
1081 |
|
T37 |
626 |
|
T114 |
1613 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T20 |
61 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T20 |
58 |
|
T37 |
30 |
|
T114 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T20 |
60 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T20 |
57 |
|
T37 |
29 |
|
T114 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T20 |
57 |
|
T37 |
25 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T20 |
57 |
|
T37 |
29 |
|
T114 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T20 |
57 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T20 |
56 |
|
T37 |
28 |
|
T114 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T20 |
57 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T20 |
56 |
|
T37 |
28 |
|
T114 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T20 |
54 |
|
T37 |
28 |
|
T114 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T20 |
53 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T20 |
52 |
|
T37 |
28 |
|
T114 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T20 |
52 |
|
T37 |
22 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T20 |
51 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T20 |
50 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T20 |
49 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T20 |
48 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T20 |
45 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T20 |
46 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T20 |
43 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T20 |
41 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T20 |
40 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T20 |
45 |
|
T37 |
20 |
|
T114 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T20 |
39 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T20 |
45 |
|
T37 |
20 |
|
T114 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T20 |
38 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58995 |
1 |
|
|
T20 |
3521 |
|
T37 |
1974 |
|
T114 |
719 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45704 |
1 |
|
|
T20 |
926 |
|
T37 |
506 |
|
T114 |
381 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62167 |
1 |
|
|
T20 |
1442 |
|
T37 |
755 |
|
T114 |
1628 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42631 |
1 |
|
|
T20 |
921 |
|
T37 |
618 |
|
T114 |
205 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T20 |
47 |
|
T37 |
23 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T20 |
42 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T20 |
46 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T20 |
40 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T20 |
45 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T20 |
40 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T20 |
44 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T20 |
39 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T20 |
43 |
|
T37 |
20 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T20 |
39 |
|
T37 |
25 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T20 |
42 |
|
T37 |
18 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T20 |
37 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T20 |
41 |
|
T37 |
18 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T20 |
35 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
30 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T20 |
39 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T20 |
35 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
30 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T20 |
39 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T20 |
34 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
30 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T20 |
37 |
|
T37 |
17 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T20 |
34 |
|
T37 |
24 |
|
T114 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
30 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T20 |
37 |
|
T37 |
16 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T20 |
34 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
30 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T20 |
37 |
|
T37 |
15 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T20 |
34 |
|
T37 |
22 |
|
T114 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
29 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T20 |
36 |
|
T37 |
14 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T20 |
33 |
|
T37 |
21 |
|
T114 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
29 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T20 |
34 |
|
T37 |
13 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T20 |
33 |
|
T37 |
21 |
|
T114 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
29 |
|
T37 |
14 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T20 |
33 |
|
T37 |
13 |
|
T114 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T20 |
34 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T20 |
32 |
|
T37 |
21 |
|
T114 |
8 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58796 |
1 |
|
|
T20 |
2620 |
|
T37 |
505 |
|
T114 |
497 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49276 |
1 |
|
|
T20 |
1188 |
|
T37 |
903 |
|
T114 |
384 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57980 |
1 |
|
|
T20 |
1477 |
|
T37 |
1855 |
|
T114 |
1724 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42601 |
1 |
|
|
T20 |
1336 |
|
T37 |
454 |
|
T114 |
312 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T20 |
65 |
|
T37 |
30 |
|
T114 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1748 |
1 |
|
|
T20 |
65 |
|
T37 |
32 |
|
T114 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T20 |
63 |
|
T37 |
29 |
|
T114 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T20 |
62 |
|
T37 |
31 |
|
T114 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T20 |
63 |
|
T37 |
29 |
|
T114 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T20 |
62 |
|
T37 |
30 |
|
T114 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T20 |
62 |
|
T37 |
29 |
|
T114 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T20 |
60 |
|
T37 |
30 |
|
T114 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T20 |
60 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T20 |
60 |
|
T37 |
28 |
|
T114 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T20 |
60 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T20 |
58 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T20 |
58 |
|
T37 |
26 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T20 |
55 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T20 |
58 |
|
T37 |
25 |
|
T114 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
21 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T20 |
53 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T20 |
56 |
|
T37 |
25 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
21 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T20 |
50 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
21 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T20 |
50 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T20 |
55 |
|
T37 |
25 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
21 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T20 |
48 |
|
T37 |
28 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T20 |
51 |
|
T37 |
24 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T20 |
47 |
|
T37 |
27 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T20 |
50 |
|
T37 |
23 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T20 |
48 |
|
T37 |
21 |
|
T114 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T20 |
20 |
|
T37 |
10 |
|
T114 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T20 |
48 |
|
T37 |
20 |
|
T114 |
5 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54236 |
1 |
|
|
T20 |
1776 |
|
T37 |
904 |
|
T114 |
424 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49196 |
1 |
|
|
T20 |
1302 |
|
T37 |
1562 |
|
T114 |
350 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56609 |
1 |
|
|
T20 |
1009 |
|
T37 |
950 |
|
T114 |
494 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48954 |
1 |
|
|
T20 |
2523 |
|
T37 |
326 |
|
T114 |
1598 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T20 |
69 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T20 |
68 |
|
T37 |
25 |
|
T114 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T20 |
67 |
|
T37 |
24 |
|
T114 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T20 |
65 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T20 |
65 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
62 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T20 |
63 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T20 |
60 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T20 |
62 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T20 |
60 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T20 |
58 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T20 |
59 |
|
T37 |
20 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T20 |
55 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T20 |
58 |
|
T37 |
20 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
20 |
|
T37 |
17 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T20 |
53 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T20 |
57 |
|
T37 |
20 |
|
T114 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T20 |
20 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T20 |
56 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T20 |
20 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T20 |
52 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T20 |
54 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T20 |
20 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T20 |
54 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T20 |
20 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T20 |
47 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T20 |
52 |
|
T37 |
16 |
|
T114 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T20 |
19 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T20 |
47 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
52 |
|
T37 |
16 |
|
T114 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T20 |
19 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T20 |
51 |
|
T37 |
15 |
|
T114 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T20 |
19 |
|
T37 |
16 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T20 |
44 |
|
T37 |
20 |
|
T114 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
21 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T20 |
50 |
|
T37 |
15 |
|
T114 |
8 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56073 |
1 |
|
|
T20 |
2444 |
|
T37 |
855 |
|
T114 |
758 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49578 |
1 |
|
|
T20 |
1213 |
|
T37 |
546 |
|
T114 |
1540 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60379 |
1 |
|
|
T20 |
1652 |
|
T37 |
838 |
|
T114 |
516 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43396 |
1 |
|
|
T20 |
1133 |
|
T37 |
1630 |
|
T114 |
120 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T20 |
62 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T20 |
65 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T20 |
60 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T20 |
65 |
|
T37 |
26 |
|
T114 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T20 |
59 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T20 |
64 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T20 |
59 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T20 |
64 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T20 |
57 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T20 |
61 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T20 |
61 |
|
T37 |
25 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T20 |
61 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T20 |
29 |
|
T37 |
12 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T20 |
58 |
|
T37 |
25 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T20 |
56 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T20 |
57 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T20 |
54 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T20 |
54 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T20 |
51 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T20 |
50 |
|
T37 |
21 |
|
T114 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T20 |
50 |
|
T37 |
23 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T20 |
48 |
|
T37 |
20 |
|
T114 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T20 |
48 |
|
T37 |
22 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T20 |
47 |
|
T37 |
17 |
|
T114 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T20 |
45 |
|
T37 |
22 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T20 |
45 |
|
T37 |
16 |
|
T114 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T20 |
29 |
|
T37 |
11 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T20 |
43 |
|
T37 |
22 |
|
T114 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T20 |
44 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60273 |
1 |
|
|
T20 |
1290 |
|
T37 |
754 |
|
T114 |
1965 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44893 |
1 |
|
|
T20 |
1107 |
|
T37 |
1566 |
|
T114 |
311 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53657 |
1 |
|
|
T20 |
1488 |
|
T37 |
913 |
|
T114 |
382 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50556 |
1 |
|
|
T20 |
2703 |
|
T37 |
623 |
|
T114 |
215 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T20 |
61 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T20 |
61 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T20 |
61 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T20 |
58 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T20 |
60 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T20 |
56 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T20 |
60 |
|
T37 |
22 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T20 |
60 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T20 |
51 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T20 |
60 |
|
T37 |
22 |
|
T114 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T20 |
51 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T20 |
59 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T20 |
50 |
|
T37 |
22 |
|
T114 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T20 |
59 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T20 |
50 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T20 |
59 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T20 |
49 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T20 |
58 |
|
T37 |
21 |
|
T114 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T20 |
48 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T20 |
57 |
|
T37 |
20 |
|
T114 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T20 |
23 |
|
T37 |
10 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T20 |
47 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T20 |
57 |
|
T37 |
19 |
|
T114 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
22 |
|
T37 |
9 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T20 |
44 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T20 |
54 |
|
T37 |
19 |
|
T114 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
22 |
|
T37 |
9 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T20 |
43 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T20 |
54 |
|
T37 |
19 |
|
T114 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
22 |
|
T37 |
9 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T20 |
40 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
23 |
|
T37 |
13 |
|
T114 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T20 |
54 |
|
T37 |
19 |
|
T114 |
9 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59886 |
1 |
|
|
T20 |
1892 |
|
T37 |
564 |
|
T114 |
816 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41975 |
1 |
|
|
T20 |
1038 |
|
T37 |
600 |
|
T114 |
1615 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58382 |
1 |
|
|
T20 |
2668 |
|
T37 |
1993 |
|
T114 |
399 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50196 |
1 |
|
|
T20 |
1161 |
|
T37 |
563 |
|
T114 |
165 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T20 |
59 |
|
T37 |
28 |
|
T114 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T20 |
57 |
|
T37 |
29 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T20 |
56 |
|
T37 |
27 |
|
T114 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T20 |
56 |
|
T37 |
29 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T20 |
54 |
|
T37 |
27 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T20 |
55 |
|
T37 |
28 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T20 |
52 |
|
T37 |
27 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T20 |
55 |
|
T37 |
28 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T20 |
50 |
|
T37 |
27 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T20 |
54 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T20 |
49 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T20 |
54 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T20 |
48 |
|
T37 |
25 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T20 |
53 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T20 |
22 |
|
T37 |
13 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T20 |
46 |
|
T37 |
23 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T20 |
52 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T20 |
46 |
|
T37 |
24 |
|
T114 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T20 |
51 |
|
T37 |
27 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T20 |
43 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T20 |
46 |
|
T37 |
26 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T20 |
22 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T20 |
41 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T20 |
46 |
|
T37 |
25 |
|
T114 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T20 |
41 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T20 |
43 |
|
T37 |
23 |
|
T114 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T20 |
41 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T20 |
42 |
|
T37 |
21 |
|
T114 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T20 |
21 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T20 |
40 |
|
T37 |
24 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T20 |
24 |
|
T37 |
12 |
|
T114 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T20 |
41 |
|
T37 |
21 |
|
T114 |
5 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53590 |
1 |
|
|
T20 |
2703 |
|
T37 |
1020 |
|
T114 |
465 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52717 |
1 |
|
|
T20 |
1192 |
|
T37 |
1592 |
|
T114 |
217 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56438 |
1 |
|
|
T20 |
1384 |
|
T37 |
714 |
|
T114 |
1835 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45093 |
1 |
|
|
T20 |
1346 |
|
T37 |
442 |
|
T114 |
318 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T20 |
59 |
|
T37 |
25 |
|
T114 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T20 |
59 |
|
T37 |
27 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T20 |
58 |
|
T37 |
24 |
|
T114 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T20 |
59 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T20 |
56 |
|
T37 |
24 |
|
T114 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T20 |
57 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T20 |
55 |
|
T37 |
21 |
|
T114 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T20 |
54 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T20 |
55 |
|
T37 |
20 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T20 |
53 |
|
T37 |
24 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T20 |
55 |
|
T37 |
19 |
|
T114 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T20 |
52 |
|
T37 |
23 |
|
T114 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T20 |
55 |
|
T37 |
19 |
|
T114 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T20 |
51 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T20 |
55 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T20 |
50 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T20 |
53 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T20 |
51 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T20 |
49 |
|
T37 |
23 |
|
T114 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T20 |
50 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T20 |
48 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T20 |
50 |
|
T37 |
19 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T20 |
48 |
|
T37 |
22 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T20 |
50 |
|
T37 |
18 |
|
T114 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T20 |
45 |
|
T37 |
20 |
|
T114 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T20 |
50 |
|
T37 |
18 |
|
T114 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T20 |
24 |
|
T37 |
14 |
|
T114 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T20 |
44 |
|
T37 |
20 |
|
T114 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T20 |
23 |
|
T37 |
15 |
|
T114 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T20 |
49 |
|
T37 |
15 |
|
T114 |
11 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55079 |
1 |
|
|
T20 |
1869 |
|
T37 |
677 |
|
T114 |
133 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45153 |
1 |
|
|
T20 |
1053 |
|
T37 |
522 |
|
T114 |
471 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64437 |
1 |
|
|
T20 |
1820 |
|
T37 |
1929 |
|
T114 |
488 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43933 |
1 |
|
|
T20 |
2119 |
|
T37 |
556 |
|
T114 |
1657 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T20 |
49 |
|
T37 |
29 |
|
T114 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T20 |
50 |
|
T37 |
31 |
|
T114 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T20 |
48 |
|
T37 |
30 |
|
T114 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T20 |
47 |
|
T37 |
29 |
|
T114 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T20 |
48 |
|
T37 |
28 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T20 |
47 |
|
T37 |
28 |
|
T114 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T20 |
46 |
|
T37 |
27 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T20 |
44 |
|
T37 |
28 |
|
T114 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T20 |
44 |
|
T37 |
25 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T20 |
44 |
|
T37 |
28 |
|
T114 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T20 |
42 |
|
T37 |
25 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T20 |
42 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T20 |
42 |
|
T37 |
24 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T20 |
41 |
|
T37 |
25 |
|
T114 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T20 |
41 |
|
T37 |
22 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T20 |
39 |
|
T37 |
25 |
|
T114 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T20 |
39 |
|
T37 |
21 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T20 |
39 |
|
T37 |
25 |
|
T114 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T20 |
38 |
|
T37 |
20 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T20 |
37 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T20 |
27 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T20 |
37 |
|
T37 |
20 |
|
T114 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T20 |
37 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T20 |
26 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T20 |
37 |
|
T37 |
20 |
|
T114 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T20 |
36 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T20 |
26 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T20 |
37 |
|
T37 |
19 |
|
T114 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T20 |
35 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T20 |
26 |
|
T37 |
15 |
|
T114 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T20 |
36 |
|
T37 |
19 |
|
T114 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T20 |
26 |
|
T37 |
13 |
|
T114 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T20 |
35 |
|
T37 |
24 |
|
T114 |
11 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58891 |
1 |
|
|
T20 |
1421 |
|
T37 |
873 |
|
T114 |
1626 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47319 |
1 |
|
|
T20 |
1288 |
|
T37 |
399 |
|
T114 |
309 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53469 |
1 |
|
|
T20 |
1302 |
|
T37 |
1770 |
|
T114 |
564 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49806 |
1 |
|
|
T20 |
2709 |
|
T37 |
758 |
|
T114 |
424 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T20 |
65 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T20 |
60 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T20 |
64 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T20 |
63 |
|
T37 |
27 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T20 |
63 |
|
T37 |
27 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T20 |
61 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T20 |
59 |
|
T37 |
29 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T20 |
61 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T20 |
59 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T20 |
59 |
|
T37 |
19 |
|
T114 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T20 |
58 |
|
T37 |
28 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T20 |
59 |
|
T37 |
18 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T20 |
56 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T20 |
55 |
|
T37 |
16 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T20 |
56 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T20 |
51 |
|
T37 |
15 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T20 |
55 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T20 |
49 |
|
T37 |
15 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T20 |
53 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T20 |
47 |
|
T37 |
15 |
|
T114 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T20 |
53 |
|
T37 |
27 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T20 |
46 |
|
T37 |
13 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T20 |
50 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T20 |
45 |
|
T37 |
13 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T20 |
15 |
|
T37 |
12 |
|
T114 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T20 |
45 |
|
T37 |
13 |
|
T114 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T20 |
20 |
|
T37 |
11 |
|
T114 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
13 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64688 |
1 |
|
|
T20 |
2080 |
|
T37 |
1846 |
|
T114 |
2109 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44287 |
1 |
|
|
T20 |
988 |
|
T37 |
571 |
|
T114 |
193 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51586 |
1 |
|
|
T20 |
2401 |
|
T37 |
633 |
|
T114 |
408 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48734 |
1 |
|
|
T20 |
1288 |
|
T37 |
613 |
|
T114 |
188 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T20 |
51 |
|
T37 |
28 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T20 |
55 |
|
T37 |
33 |
|
T114 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T20 |
50 |
|
T37 |
28 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T20 |
54 |
|
T37 |
33 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T20 |
49 |
|
T37 |
26 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T20 |
52 |
|
T37 |
31 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T20 |
47 |
|
T37 |
25 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T20 |
51 |
|
T37 |
31 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T20 |
45 |
|
T37 |
25 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T20 |
51 |
|
T37 |
31 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T20 |
45 |
|
T37 |
23 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T20 |
51 |
|
T37 |
30 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T20 |
45 |
|
T37 |
22 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T20 |
51 |
|
T37 |
30 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T20 |
27 |
|
T37 |
17 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T20 |
51 |
|
T37 |
30 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T20 |
43 |
|
T37 |
22 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T20 |
49 |
|
T37 |
28 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T20 |
43 |
|
T37 |
22 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T20 |
48 |
|
T37 |
28 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T20 |
42 |
|
T37 |
21 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T20 |
47 |
|
T37 |
28 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T20 |
41 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T20 |
47 |
|
T37 |
28 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T20 |
39 |
|
T37 |
20 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T20 |
47 |
|
T37 |
27 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T20 |
38 |
|
T37 |
19 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T20 |
45 |
|
T37 |
26 |
|
T114 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T20 |
27 |
|
T37 |
16 |
|
T114 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T20 |
36 |
|
T37 |
19 |
|
T114 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T20 |
23 |
|
T37 |
11 |
|
T114 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T20 |
43 |
|
T37 |
25 |
|
T114 |
7 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59399 |
1 |
|
|
T20 |
3010 |
|
T37 |
1792 |
|
T114 |
155 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45584 |
1 |
|
|
T20 |
1074 |
|
T37 |
605 |
|
T114 |
1648 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62007 |
1 |
|
|
T20 |
1337 |
|
T37 |
713 |
|
T114 |
436 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43169 |
1 |
|
|
T20 |
1241 |
|
T37 |
690 |
|
T114 |
714 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T20 |
58 |
|
T37 |
30 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T20 |
61 |
|
T37 |
30 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T20 |
58 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T20 |
59 |
|
T37 |
30 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T20 |
58 |
|
T37 |
28 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T20 |
58 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T20 |
56 |
|
T37 |
27 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T20 |
57 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T20 |
53 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T20 |
57 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T20 |
51 |
|
T37 |
25 |
|
T114 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T20 |
56 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T20 |
50 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T20 |
56 |
|
T37 |
29 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T20 |
25 |
|
T37 |
10 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T20 |
50 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T20 |
55 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T20 |
49 |
|
T37 |
25 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T20 |
53 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T20 |
48 |
|
T37 |
23 |
|
T114 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T20 |
50 |
|
T37 |
28 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T20 |
47 |
|
T37 |
23 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T20 |
50 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T20 |
46 |
|
T37 |
22 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T20 |
49 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T20 |
45 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T20 |
48 |
|
T37 |
24 |
|
T114 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T20 |
43 |
|
T37 |
21 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T20 |
47 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T20 |
25 |
|
T37 |
9 |
|
T114 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T20 |
43 |
|
T37 |
20 |
|
T114 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T20 |
21 |
|
T37 |
9 |
|
T114 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T20 |
45 |
|
T37 |
24 |
|
T114 |
12 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63365 |
1 |
|
|
T20 |
2987 |
|
T37 |
1816 |
|
T114 |
313 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46875 |
1 |
|
|
T20 |
952 |
|
T37 |
912 |
|
T114 |
1729 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54937 |
1 |
|
|
T20 |
1536 |
|
T37 |
525 |
|
T114 |
236 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43619 |
1 |
|
|
T20 |
1373 |
|
T37 |
482 |
|
T114 |
424 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T20 |
51 |
|
T37 |
31 |
|
T114 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T20 |
52 |
|
T37 |
34 |
|
T114 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T20 |
49 |
|
T37 |
31 |
|
T114 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T20 |
51 |
|
T37 |
33 |
|
T114 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T20 |
49 |
|
T37 |
31 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T20 |
51 |
|
T37 |
33 |
|
T114 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T20 |
48 |
|
T37 |
31 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T20 |
51 |
|
T37 |
33 |
|
T114 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T20 |
47 |
|
T37 |
31 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T20 |
51 |
|
T37 |
32 |
|
T114 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T20 |
47 |
|
T37 |
31 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T20 |
51 |
|
T37 |
30 |
|
T114 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T20 |
47 |
|
T37 |
30 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T20 |
49 |
|
T37 |
30 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T20 |
24 |
|
T37 |
11 |
|
T114 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T20 |
46 |
|
T37 |
26 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T20 |
48 |
|
T37 |
29 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T20 |
44 |
|
T37 |
26 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T20 |
47 |
|
T37 |
29 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T20 |
42 |
|
T37 |
26 |
|
T114 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T20 |
47 |
|
T37 |
28 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T20 |
39 |
|
T37 |
26 |
|
T114 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T20 |
47 |
|
T37 |
26 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T20 |
37 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T20 |
45 |
|
T37 |
25 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T20 |
36 |
|
T37 |
26 |
|
T114 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T20 |
44 |
|
T37 |
25 |
|
T114 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T20 |
35 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T20 |
44 |
|
T37 |
24 |
|
T114 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T20 |
24 |
|
T37 |
10 |
|
T114 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T20 |
33 |
|
T37 |
26 |
|
T114 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T20 |
22 |
|
T37 |
7 |
|
T114 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T20 |
42 |
|
T37 |
23 |
|
T114 |
20 |