Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6989131 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
4773248 |
1 |
|
|
T23 |
42 |
|
T25 |
54 |
|
T29 |
138056 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9759651 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
2002728 |
1 |
|
|
T23 |
5 |
|
T25 |
42 |
|
T29 |
52604 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7006111 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
4756268 |
1 |
|
|
T23 |
18 |
|
T25 |
83 |
|
T29 |
138964 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1369613 |
1 |
|
|
T23 |
3 |
|
T25 |
26 |
|
T29 |
43038 |
| auto[1] |
auto[0] |
auto[1] |
998132 |
1 |
|
|
T23 |
2 |
|
T25 |
16 |
|
T29 |
25784 |
| auto[1] |
auto[1] |
auto[0] |
1383927 |
1 |
|
|
T23 |
10 |
|
T25 |
15 |
|
T29 |
43322 |
| auto[1] |
auto[1] |
auto[1] |
1004596 |
1 |
|
|
T23 |
3 |
|
T25 |
26 |
|
T29 |
26820 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |