Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6993100 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
4769279 |
1 |
|
|
T23 |
30 |
|
T25 |
14 |
|
T29 |
135436 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11152250 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
610129 |
1 |
|
|
T23 |
2 |
|
T25 |
1 |
|
T29 |
18195 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7010777 |
1 |
|
|
T20 |
1749 |
|
T21 |
505 |
|
T22 |
217 |
| auto[1] |
4751602 |
1 |
|
|
T23 |
57 |
|
T25 |
21 |
|
T29 |
145091 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2077898 |
1 |
|
|
T23 |
42 |
|
T25 |
18 |
|
T29 |
66314 |
| auto[1] |
auto[0] |
auto[1] |
306045 |
1 |
|
|
T23 |
1 |
|
T25 |
1 |
|
T29 |
9415 |
| auto[1] |
auto[1] |
auto[0] |
2063575 |
1 |
|
|
T23 |
13 |
|
T25 |
2 |
|
T29 |
60582 |
| auto[1] |
auto[1] |
auto[1] |
304084 |
1 |
|
|
T23 |
1 |
|
T29 |
8780 |
|
T112 |
113 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |