cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61442 |
1 |
|
|
T26 |
1129 |
|
T102 |
125 |
|
T103 |
511 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48007 |
1 |
|
|
T26 |
1616 |
|
T102 |
348 |
|
T103 |
347 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56461 |
1 |
|
|
T26 |
1079 |
|
T102 |
92 |
|
T103 |
1940 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49214 |
1 |
|
|
T26 |
940 |
|
T102 |
743 |
|
T103 |
579 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T26 |
45 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T26 |
47 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T26 |
45 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T26 |
43 |
|
T102 |
8 |
|
T103 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T26 |
41 |
|
T102 |
8 |
|
T103 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T26 |
42 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T26 |
39 |
|
T102 |
8 |
|
T103 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T26 |
42 |
|
T102 |
6 |
|
T103 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T26 |
30 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57544 |
1 |
|
|
T26 |
1318 |
|
T102 |
192 |
|
T103 |
441 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44871 |
1 |
|
|
T26 |
1597 |
|
T102 |
136 |
|
T103 |
432 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60535 |
1 |
|
|
T26 |
1060 |
|
T102 |
727 |
|
T103 |
1734 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51342 |
1 |
|
|
T26 |
791 |
|
T102 |
139 |
|
T103 |
600 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T26 |
40 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T26 |
39 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T26 |
44 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T26 |
37 |
|
T102 |
10 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T26 |
43 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T26 |
35 |
|
T102 |
10 |
|
T103 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T26 |
41 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T26 |
32 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T26 |
37 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T26 |
37 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T26 |
36 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T26 |
27 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62427 |
1 |
|
|
T26 |
1153 |
|
T102 |
851 |
|
T103 |
648 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46045 |
1 |
|
|
T26 |
852 |
|
T102 |
105 |
|
T103 |
504 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57393 |
1 |
|
|
T26 |
1131 |
|
T102 |
288 |
|
T103 |
749 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48517 |
1 |
|
|
T26 |
1655 |
|
T102 |
97 |
|
T103 |
1426 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T26 |
39 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T26 |
39 |
|
T102 |
2 |
|
T103 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T26 |
38 |
|
T102 |
1 |
|
T103 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T26 |
36 |
|
T102 |
1 |
|
T103 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T26 |
35 |
|
T102 |
1 |
|
T103 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T26 |
20 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T26 |
34 |
|
T102 |
1 |
|
T103 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T26 |
19 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T26 |
32 |
|
T102 |
1 |
|
T103 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T26 |
19 |
|
T102 |
7 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T26 |
32 |
|
T102 |
1 |
|
T103 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T26 |
32 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T26 |
31 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T26 |
30 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T26 |
30 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T26 |
30 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T26 |
27 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T26 |
19 |
|
T102 |
6 |
|
T103 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T26 |
25 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54761 |
1 |
|
|
T26 |
870 |
|
T102 |
788 |
|
T103 |
640 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45801 |
1 |
|
|
T26 |
925 |
|
T102 |
105 |
|
T103 |
1235 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
69117 |
1 |
|
|
T26 |
1954 |
|
T102 |
273 |
|
T103 |
758 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46088 |
1 |
|
|
T26 |
945 |
|
T102 |
151 |
|
T103 |
590 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T26 |
49 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T26 |
51 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T26 |
48 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T26 |
51 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T26 |
47 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T26 |
47 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T26 |
47 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T26 |
47 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T26 |
47 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T26 |
36 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58009 |
1 |
|
|
T26 |
1446 |
|
T102 |
761 |
|
T103 |
1608 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48723 |
1 |
|
|
T26 |
1725 |
|
T102 |
99 |
|
T103 |
550 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61650 |
1 |
|
|
T26 |
1062 |
|
T102 |
95 |
|
T103 |
636 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46902 |
1 |
|
|
T26 |
641 |
|
T102 |
242 |
|
T103 |
521 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T26 |
35 |
|
T102 |
10 |
|
T103 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T26 |
37 |
|
T102 |
12 |
|
T103 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T26 |
35 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T26 |
36 |
|
T102 |
12 |
|
T103 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T26 |
34 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T26 |
36 |
|
T102 |
12 |
|
T103 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T26 |
34 |
|
T102 |
12 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T26 |
33 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T26 |
34 |
|
T102 |
12 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T26 |
33 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T26 |
33 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T26 |
32 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T26 |
32 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T26 |
29 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T26 |
29 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
24 |
|
T102 |
11 |
|
T103 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T26 |
23 |
|
T102 |
11 |
|
T103 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T26 |
21 |
|
T102 |
11 |
|
T103 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T26 |
21 |
|
T102 |
11 |
|
T103 |
18 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60968 |
1 |
|
|
T26 |
953 |
|
T102 |
191 |
|
T103 |
630 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50752 |
1 |
|
|
T26 |
1790 |
|
T102 |
210 |
|
T103 |
1394 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55257 |
1 |
|
|
T26 |
882 |
|
T102 |
69 |
|
T103 |
728 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49947 |
1 |
|
|
T26 |
1106 |
|
T102 |
777 |
|
T103 |
512 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
13 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T26 |
50 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T26 |
49 |
|
T102 |
11 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
13 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T26 |
50 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T26 |
49 |
|
T102 |
11 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
13 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T26 |
49 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T26 |
49 |
|
T102 |
11 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
13 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T26 |
49 |
|
T102 |
10 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T26 |
48 |
|
T102 |
9 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T26 |
48 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T26 |
46 |
|
T102 |
9 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T26 |
48 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T26 |
44 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T26 |
46 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T26 |
44 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T26 |
45 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T26 |
38 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T26 |
37 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T26 |
41 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T26 |
32 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T26 |
39 |
|
T102 |
8 |
|
T103 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
13 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
13 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T26 |
39 |
|
T102 |
8 |
|
T103 |
14 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60687 |
1 |
|
|
T26 |
1283 |
|
T102 |
180 |
|
T103 |
298 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51421 |
1 |
|
|
T26 |
789 |
|
T102 |
681 |
|
T103 |
1436 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55500 |
1 |
|
|
T26 |
955 |
|
T102 |
265 |
|
T103 |
607 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47837 |
1 |
|
|
T26 |
1802 |
|
T102 |
183 |
|
T103 |
850 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1734 |
1 |
|
|
T26 |
43 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T26 |
45 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T26 |
43 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T26 |
41 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T26 |
43 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
17 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T26 |
33 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T26 |
33 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T26 |
37 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53214 |
1 |
|
|
T26 |
725 |
|
T102 |
153 |
|
T103 |
759 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49526 |
1 |
|
|
T26 |
1016 |
|
T102 |
178 |
|
T103 |
1448 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66328 |
1 |
|
|
T26 |
2197 |
|
T102 |
328 |
|
T103 |
694 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46167 |
1 |
|
|
T26 |
800 |
|
T102 |
648 |
|
T103 |
413 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T26 |
50 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T26 |
48 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T26 |
49 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T26 |
48 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T26 |
47 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T26 |
45 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T26 |
47 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T26 |
42 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T26 |
42 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T26 |
45 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T26 |
45 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T26 |
42 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T26 |
42 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T26 |
41 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
14 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63804 |
1 |
|
|
T26 |
813 |
|
T102 |
331 |
|
T103 |
1330 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50709 |
1 |
|
|
T26 |
878 |
|
T102 |
152 |
|
T103 |
699 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51648 |
1 |
|
|
T26 |
1039 |
|
T102 |
655 |
|
T103 |
598 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48040 |
1 |
|
|
T26 |
1944 |
|
T102 |
124 |
|
T103 |
526 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T26 |
46 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T26 |
50 |
|
T102 |
9 |
|
T103 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T26 |
48 |
|
T102 |
9 |
|
T103 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T26 |
48 |
|
T102 |
9 |
|
T103 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T26 |
46 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T26 |
44 |
|
T102 |
9 |
|
T103 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T26 |
46 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T26 |
41 |
|
T102 |
8 |
|
T103 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T26 |
43 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T26 |
40 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T26 |
39 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55867 |
1 |
|
|
T26 |
2057 |
|
T102 |
137 |
|
T103 |
756 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49036 |
1 |
|
|
T26 |
879 |
|
T102 |
821 |
|
T103 |
297 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57757 |
1 |
|
|
T26 |
1190 |
|
T102 |
105 |
|
T103 |
1860 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51412 |
1 |
|
|
T26 |
855 |
|
T102 |
188 |
|
T103 |
440 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T26 |
37 |
|
T102 |
10 |
|
T103 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T26 |
41 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T26 |
37 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T26 |
40 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T26 |
36 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T26 |
38 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T26 |
36 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T26 |
35 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T26 |
35 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T26 |
34 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T26 |
33 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T26 |
32 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T26 |
31 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T26 |
31 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T26 |
31 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T26 |
30 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T26 |
31 |
|
T102 |
9 |
|
T103 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T26 |
28 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T26 |
31 |
|
T102 |
9 |
|
T103 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T26 |
28 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T26 |
28 |
|
T102 |
9 |
|
T103 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T26 |
27 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63204 |
1 |
|
|
T26 |
2017 |
|
T102 |
1052 |
|
T103 |
1701 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49014 |
1 |
|
|
T26 |
843 |
|
T102 |
131 |
|
T103 |
658 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60452 |
1 |
|
|
T26 |
1304 |
|
T102 |
109 |
|
T103 |
409 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43499 |
1 |
|
|
T26 |
800 |
|
T102 |
46 |
|
T103 |
559 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T26 |
38 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T26 |
37 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T26 |
36 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T26 |
30 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T26 |
30 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T26 |
30 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T26 |
30 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64730 |
1 |
|
|
T26 |
1997 |
|
T102 |
132 |
|
T103 |
1486 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48141 |
1 |
|
|
T26 |
598 |
|
T102 |
817 |
|
T103 |
612 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53258 |
1 |
|
|
T26 |
1454 |
|
T102 |
207 |
|
T103 |
544 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48912 |
1 |
|
|
T26 |
892 |
|
T102 |
107 |
|
T103 |
549 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1772 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T26 |
30 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T26 |
29 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T26 |
30 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T26 |
29 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T26 |
29 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
22 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T26 |
29 |
|
T102 |
10 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T26 |
28 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
22 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T26 |
29 |
|
T102 |
10 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T26 |
27 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T26 |
29 |
|
T102 |
10 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T26 |
27 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T26 |
29 |
|
T102 |
10 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T26 |
25 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T26 |
29 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T26 |
24 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T26 |
29 |
|
T102 |
9 |
|
T103 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T26 |
24 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T26 |
28 |
|
T102 |
9 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T26 |
28 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T26 |
28 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T26 |
28 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T26 |
26 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T26 |
23 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T26 |
22 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54190 |
1 |
|
|
T26 |
1016 |
|
T102 |
323 |
|
T103 |
883 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45215 |
1 |
|
|
T26 |
808 |
|
T102 |
98 |
|
T103 |
481 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66485 |
1 |
|
|
T26 |
2427 |
|
T102 |
849 |
|
T103 |
1454 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48228 |
1 |
|
|
T26 |
617 |
|
T102 |
29 |
|
T103 |
407 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1772 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T26 |
32 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T26 |
33 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T26 |
32 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T26 |
30 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T26 |
29 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T26 |
27 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T26 |
26 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T26 |
27 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
25 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T26 |
25 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T26 |
25 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T26 |
26 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
23 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T26 |
25 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58836 |
1 |
|
|
T26 |
1816 |
|
T102 |
140 |
|
T103 |
899 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52851 |
1 |
|
|
T26 |
834 |
|
T102 |
177 |
|
T103 |
520 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51348 |
1 |
|
|
T26 |
1297 |
|
T102 |
122 |
|
T103 |
654 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51100 |
1 |
|
|
T26 |
987 |
|
T102 |
831 |
|
T103 |
1286 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1848 |
1 |
|
|
T26 |
37 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1843 |
1 |
|
|
T26 |
41 |
|
T102 |
9 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1814 |
1 |
|
|
T26 |
37 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T26 |
38 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T26 |
35 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T26 |
38 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T26 |
34 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T26 |
34 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T26 |
33 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T26 |
32 |
|
T102 |
9 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T26 |
32 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T26 |
31 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T26 |
30 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T26 |
30 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T26 |
29 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60358 |
1 |
|
|
T26 |
1267 |
|
T102 |
201 |
|
T103 |
1525 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43903 |
1 |
|
|
T26 |
1021 |
|
T102 |
168 |
|
T103 |
692 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62818 |
1 |
|
|
T26 |
1727 |
|
T102 |
146 |
|
T103 |
601 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48023 |
1 |
|
|
T26 |
926 |
|
T102 |
772 |
|
T103 |
402 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T26 |
37 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T26 |
33 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T26 |
36 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T26 |
33 |
|
T102 |
6 |
|
T103 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56951 |
1 |
|
|
T26 |
1615 |
|
T102 |
881 |
|
T103 |
840 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48123 |
1 |
|
|
T26 |
727 |
|
T102 |
101 |
|
T103 |
533 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59904 |
1 |
|
|
T26 |
904 |
|
T102 |
153 |
|
T103 |
1416 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48195 |
1 |
|
|
T26 |
1638 |
|
T102 |
176 |
|
T103 |
526 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1819 |
1 |
|
|
T26 |
33 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1814 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1780 |
1 |
|
|
T26 |
33 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T26 |
33 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T26 |
33 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
22 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T26 |
30 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T26 |
27 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T26 |
28 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T26 |
26 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56416 |
1 |
|
|
T26 |
1546 |
|
T102 |
829 |
|
T103 |
769 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47505 |
1 |
|
|
T26 |
581 |
|
T102 |
48 |
|
T103 |
1221 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60003 |
1 |
|
|
T26 |
1051 |
|
T102 |
308 |
|
T103 |
649 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51307 |
1 |
|
|
T26 |
1666 |
|
T102 |
102 |
|
T103 |
615 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
21 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1780 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
21 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T26 |
21 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T26 |
21 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
21 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T26 |
36 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
21 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T26 |
26 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T26 |
24 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T26 |
23 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T26 |
22 |
|
T102 |
5 |
|
T103 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T26 |
31 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56620 |
1 |
|
|
T26 |
1213 |
|
T102 |
297 |
|
T103 |
702 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47250 |
1 |
|
|
T26 |
771 |
|
T102 |
718 |
|
T103 |
328 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63410 |
1 |
|
|
T26 |
1690 |
|
T102 |
111 |
|
T103 |
890 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48028 |
1 |
|
|
T26 |
1049 |
|
T102 |
156 |
|
T103 |
1430 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T26 |
38 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T26 |
38 |
|
T102 |
9 |
|
T103 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T26 |
38 |
|
T102 |
9 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T26 |
36 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T26 |
36 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T26 |
41 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T26 |
40 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T26 |
34 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T26 |
32 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T26 |
30 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T26 |
19 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T26 |
36 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58129 |
1 |
|
|
T26 |
2040 |
|
T102 |
124 |
|
T103 |
738 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46458 |
1 |
|
|
T26 |
688 |
|
T102 |
135 |
|
T103 |
380 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58984 |
1 |
|
|
T26 |
1295 |
|
T102 |
1003 |
|
T103 |
1811 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51048 |
1 |
|
|
T26 |
955 |
|
T102 |
108 |
|
T103 |
500 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1796 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1769 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T26 |
33 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T26 |
32 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T26 |
32 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T26 |
30 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T26 |
31 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T26 |
29 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T26 |
29 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T26 |
27 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T26 |
27 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T26 |
27 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T26 |
25 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57349 |
1 |
|
|
T26 |
1936 |
|
T102 |
237 |
|
T103 |
723 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46608 |
1 |
|
|
T26 |
866 |
|
T102 |
110 |
|
T103 |
312 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61050 |
1 |
|
|
T26 |
1137 |
|
T102 |
311 |
|
T103 |
848 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50692 |
1 |
|
|
T26 |
858 |
|
T102 |
647 |
|
T103 |
1312 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T26 |
43 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T26 |
43 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T26 |
43 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T26 |
43 |
|
T102 |
3 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T26 |
43 |
|
T102 |
2 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T26 |
42 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T26 |
43 |
|
T102 |
2 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T26 |
43 |
|
T102 |
2 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T26 |
39 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T26 |
42 |
|
T102 |
2 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T26 |
40 |
|
T102 |
2 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T26 |
40 |
|
T102 |
2 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T26 |
37 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T26 |
36 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T26 |
35 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T26 |
35 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T26 |
34 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T26 |
33 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T26 |
16 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T26 |
16 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T26 |
29 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56014 |
1 |
|
|
T26 |
1872 |
|
T102 |
54 |
|
T103 |
805 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52249 |
1 |
|
|
T26 |
845 |
|
T102 |
110 |
|
T103 |
575 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59194 |
1 |
|
|
T26 |
1109 |
|
T102 |
278 |
|
T103 |
1449 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46207 |
1 |
|
|
T26 |
970 |
|
T102 |
831 |
|
T103 |
525 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1846 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1805 |
1 |
|
|
T26 |
48 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T26 |
41 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T26 |
47 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T26 |
39 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T26 |
46 |
|
T102 |
10 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T26 |
45 |
|
T102 |
10 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T26 |
44 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T26 |
21 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T26 |
41 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T26 |
38 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T26 |
38 |
|
T102 |
10 |
|
T103 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T26 |
37 |
|
T102 |
10 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T26 |
37 |
|
T102 |
10 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T26 |
36 |
|
T102 |
10 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T26 |
30 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T26 |
36 |
|
T102 |
10 |
|
T103 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T26 |
30 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T26 |
35 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T26 |
35 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
15 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T26 |
35 |
|
T102 |
10 |
|
T103 |
16 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55106 |
1 |
|
|
T26 |
1892 |
|
T102 |
139 |
|
T103 |
861 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43293 |
1 |
|
|
T26 |
1007 |
|
T102 |
85 |
|
T103 |
385 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62230 |
1 |
|
|
T26 |
959 |
|
T102 |
300 |
|
T103 |
1682 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54912 |
1 |
|
|
T26 |
1053 |
|
T102 |
704 |
|
T103 |
413 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
15 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T26 |
43 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
15 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T26 |
41 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
15 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T26 |
44 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T26 |
15 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T26 |
43 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T26 |
36 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T26 |
41 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T26 |
36 |
|
T102 |
8 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T26 |
35 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
13 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
10 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60856 |
1 |
|
|
T26 |
1127 |
|
T102 |
852 |
|
T103 |
1588 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47380 |
1 |
|
|
T26 |
1154 |
|
T102 |
237 |
|
T103 |
344 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57662 |
1 |
|
|
T26 |
1397 |
|
T102 |
145 |
|
T103 |
823 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48887 |
1 |
|
|
T26 |
1332 |
|
T102 |
92 |
|
T103 |
530 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T26 |
35 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T26 |
18 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T26 |
34 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T26 |
34 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T26 |
31 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T26 |
28 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T26 |
26 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T26 |
24 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T26 |
24 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T26 |
22 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T26 |
21 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T26 |
18 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T26 |
31 |
|
T102 |
6 |
|
T103 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65681 |
1 |
|
|
T26 |
1675 |
|
T102 |
156 |
|
T103 |
936 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44731 |
1 |
|
|
T26 |
662 |
|
T102 |
89 |
|
T103 |
402 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62516 |
1 |
|
|
T26 |
1108 |
|
T102 |
1009 |
|
T103 |
1439 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43351 |
1 |
|
|
T26 |
1251 |
|
T102 |
103 |
|
T103 |
564 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T26 |
54 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T26 |
47 |
|
T102 |
3 |
|
T103 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T26 |
53 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T26 |
45 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T26 |
49 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T26 |
43 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T26 |
49 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T26 |
41 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T26 |
48 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T26 |
41 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T26 |
47 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T26 |
39 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T26 |
47 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T26 |
36 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T26 |
47 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T26 |
27 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T26 |
24 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T26 |
45 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T26 |
22 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T26 |
45 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
14 |
|
T102 |
4 |
|
T103 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T26 |
45 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62645 |
1 |
|
|
T26 |
1704 |
|
T102 |
628 |
|
T103 |
870 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45138 |
1 |
|
|
T26 |
951 |
|
T102 |
264 |
|
T103 |
353 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56400 |
1 |
|
|
T26 |
1152 |
|
T102 |
399 |
|
T103 |
1683 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50893 |
1 |
|
|
T26 |
966 |
|
T102 |
127 |
|
T103 |
371 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T26 |
47 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T26 |
47 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T26 |
46 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T26 |
47 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T26 |
45 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
16 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T26 |
45 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T26 |
44 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T26 |
44 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T26 |
41 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T26 |
43 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T26 |
42 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T26 |
37 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T26 |
41 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T26 |
39 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T26 |
36 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
15 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T26 |
36 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T26 |
16 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T26 |
31 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56986 |
1 |
|
|
T26 |
991 |
|
T102 |
880 |
|
T103 |
1863 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49324 |
1 |
|
|
T26 |
1108 |
|
T102 |
188 |
|
T103 |
472 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59649 |
1 |
|
|
T26 |
1133 |
|
T102 |
179 |
|
T103 |
803 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49810 |
1 |
|
|
T26 |
1604 |
|
T102 |
116 |
|
T103 |
301 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T26 |
41 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T26 |
44 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T26 |
40 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T26 |
44 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T26 |
44 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T26 |
38 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T26 |
43 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T26 |
37 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T26 |
43 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T26 |
42 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T26 |
41 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T26 |
39 |
|
T102 |
4 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T26 |
34 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T26 |
31 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T26 |
29 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T26 |
29 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T26 |
35 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T26 |
17 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
14 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62895 |
1 |
|
|
T26 |
1192 |
|
T102 |
144 |
|
T103 |
1009 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46872 |
1 |
|
|
T26 |
937 |
|
T102 |
653 |
|
T103 |
372 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58736 |
1 |
|
|
T26 |
1055 |
|
T102 |
466 |
|
T103 |
1548 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47700 |
1 |
|
|
T26 |
1716 |
|
T102 |
122 |
|
T103 |
409 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T26 |
38 |
|
T102 |
2 |
|
T103 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T26 |
42 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T26 |
37 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T26 |
40 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T26 |
36 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T26 |
40 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T26 |
20 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T26 |
34 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T26 |
38 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T26 |
32 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T26 |
38 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T26 |
32 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T26 |
37 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T26 |
36 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T26 |
31 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T26 |
35 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T26 |
30 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
33 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T26 |
30 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T26 |
29 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T26 |
30 |
|
T102 |
4 |
|
T103 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T26 |
29 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T26 |
29 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
19 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T26 |
29 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
16 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T26 |
29 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63046 |
1 |
|
|
T26 |
1776 |
|
T102 |
811 |
|
T103 |
403 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44033 |
1 |
|
|
T26 |
1027 |
|
T102 |
259 |
|
T103 |
495 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60490 |
1 |
|
|
T26 |
1146 |
|
T102 |
82 |
|
T103 |
1598 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47785 |
1 |
|
|
T26 |
774 |
|
T102 |
124 |
|
T103 |
716 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T26 |
43 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T26 |
43 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T26 |
48 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T26 |
47 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T26 |
42 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T26 |
46 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T26 |
41 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T26 |
45 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T26 |
41 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T26 |
44 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
20 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T26 |
42 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T26 |
40 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T26 |
38 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T26 |
39 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T26 |
35 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T26 |
34 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T26 |
14 |
|
T102 |
3 |
|
T103 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51215 |
1 |
|
|
T26 |
1033 |
|
T102 |
278 |
|
T103 |
779 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53400 |
1 |
|
|
T26 |
1956 |
|
T102 |
725 |
|
T103 |
1318 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58271 |
1 |
|
|
T26 |
953 |
|
T102 |
116 |
|
T103 |
714 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50925 |
1 |
|
|
T26 |
852 |
|
T102 |
158 |
|
T103 |
531 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T26 |
38 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1769 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T26 |
37 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T26 |
45 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T26 |
37 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T26 |
15 |
|
T102 |
4 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T26 |
43 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T26 |
36 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T26 |
34 |
|
T102 |
8 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T26 |
33 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T26 |
40 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T26 |
40 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T26 |
32 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T26 |
29 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
28 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T26 |
26 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T26 |
26 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
15 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T26 |
37 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T26 |
21 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T26 |
26 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60859 |
1 |
|
|
T26 |
2431 |
|
T102 |
50 |
|
T103 |
1711 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45087 |
1 |
|
|
T26 |
891 |
|
T102 |
145 |
|
T103 |
598 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62879 |
1 |
|
|
T26 |
1109 |
|
T102 |
974 |
|
T103 |
587 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46850 |
1 |
|
|
T26 |
583 |
|
T102 |
175 |
|
T103 |
381 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T26 |
32 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T26 |
31 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T26 |
20 |
|
T102 |
3 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T26 |
32 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T26 |
20 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T26 |
30 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T26 |
28 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T26 |
30 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T26 |
27 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T26 |
28 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T26 |
27 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T26 |
26 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T26 |
24 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T26 |
23 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T26 |
19 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T26 |
28 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T26 |
18 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T26 |
22 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60784 |
1 |
|
|
T26 |
752 |
|
T102 |
142 |
|
T103 |
758 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50577 |
1 |
|
|
T26 |
993 |
|
T102 |
62 |
|
T103 |
1149 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59285 |
1 |
|
|
T26 |
1109 |
|
T102 |
1043 |
|
T103 |
828 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43762 |
1 |
|
|
T26 |
1884 |
|
T102 |
78 |
|
T103 |
458 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T26 |
44 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T26 |
43 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T26 |
41 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T26 |
40 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T26 |
40 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T26 |
50 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T26 |
49 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T26 |
48 |
|
T102 |
3 |
|
T103 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T26 |
46 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T26 |
38 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T26 |
46 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T26 |
46 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T26 |
37 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T26 |
45 |
|
T102 |
3 |
|
T103 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T26 |
44 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T26 |
43 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T26 |
34 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T26 |
43 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T26 |
17 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T26 |
32 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T26 |
11 |
|
T102 |
5 |
|
T103 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T26 |
43 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62206 |
1 |
|
|
T26 |
1059 |
|
T102 |
2 |
|
T103 |
881 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50481 |
1 |
|
|
T26 |
706 |
|
T102 |
734 |
|
T103 |
448 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55623 |
1 |
|
|
T26 |
993 |
|
T102 |
347 |
|
T103 |
1687 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47269 |
1 |
|
|
T26 |
1862 |
|
T102 |
211 |
|
T103 |
345 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T26 |
49 |
|
T102 |
10 |
|
T103 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T26 |
49 |
|
T102 |
9 |
|
T103 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T26 |
49 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T26 |
49 |
|
T102 |
9 |
|
T103 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T26 |
48 |
|
T102 |
10 |
|
T103 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T26 |
47 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T26 |
47 |
|
T102 |
10 |
|
T103 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T26 |
46 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T26 |
17 |
|
T103 |
12 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T26 |
46 |
|
T102 |
10 |
|
T103 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T26 |
46 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T26 |
17 |
|
T103 |
12 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T26 |
44 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T26 |
44 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T26 |
40 |
|
T102 |
9 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T26 |
45 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T26 |
39 |
|
T102 |
8 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T26 |
44 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T26 |
39 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T26 |
44 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T26 |
36 |
|
T102 |
7 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T26 |
35 |
|
T102 |
7 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T26 |
33 |
|
T102 |
7 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T26 |
43 |
|
T102 |
9 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T26 |
17 |
|
T103 |
11 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T26 |
29 |
|
T102 |
6 |
|
T103 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T26 |
17 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T26 |
42 |
|
T102 |
9 |
|
T103 |
14 |