CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins | 4 | 0 | 4 | 100.00 |
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | auto[0] | 1141306 | 1 | T32 | 63 | T35 | 192 | T36 | 61 | ||||
auto[0] | auto[1] | 616422 | 1 | T32 | 17 | T35 | 141 | T36 | 3 | ||||
auto[1] | auto[0] | 922096 | 1 | T32 | 17 | T35 | 168 | T36 | 22 | ||||
auto[1] | auto[1] | 607457 | 1 | T32 | 1 | T35 | 133 | T37 | 10 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |