cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61450 |
1 |
|
|
T55 |
1957 |
|
T110 |
1726 |
|
T111 |
1351 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47616 |
1 |
|
|
T55 |
1116 |
|
T110 |
320 |
|
T111 |
2046 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59355 |
1 |
|
|
T55 |
796 |
|
T110 |
305 |
|
T111 |
1467 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49073 |
1 |
|
|
T55 |
1066 |
|
T110 |
123 |
|
T111 |
1156 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T55 |
49 |
|
T110 |
9 |
|
T111 |
57 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T55 |
55 |
|
T110 |
7 |
|
T111 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T55 |
48 |
|
T110 |
9 |
|
T111 |
56 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T55 |
53 |
|
T110 |
7 |
|
T111 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T55 |
46 |
|
T110 |
9 |
|
T111 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T55 |
53 |
|
T110 |
6 |
|
T111 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T55 |
52 |
|
T110 |
6 |
|
T111 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
52 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T55 |
52 |
|
T110 |
5 |
|
T111 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T55 |
50 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T55 |
47 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T55 |
39 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T55 |
46 |
|
T110 |
5 |
|
T111 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T55 |
38 |
|
T110 |
9 |
|
T111 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T55 |
45 |
|
T110 |
5 |
|
T111 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T55 |
44 |
|
T110 |
5 |
|
T111 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T55 |
37 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T55 |
44 |
|
T110 |
5 |
|
T111 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T55 |
37 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T55 |
42 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T55 |
37 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T55 |
41 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T55 |
39 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56835 |
1 |
|
|
T55 |
1411 |
|
T110 |
385 |
|
T111 |
1926 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49267 |
1 |
|
|
T55 |
1460 |
|
T110 |
210 |
|
T111 |
1183 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65518 |
1 |
|
|
T55 |
1151 |
|
T110 |
328 |
|
T111 |
1946 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46058 |
1 |
|
|
T55 |
1030 |
|
T110 |
1451 |
|
T111 |
895 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1769 |
1 |
|
|
T55 |
47 |
|
T110 |
12 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T55 |
43 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T55 |
46 |
|
T110 |
12 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T55 |
43 |
|
T110 |
11 |
|
T111 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T55 |
43 |
|
T110 |
11 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T55 |
40 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T55 |
37 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T55 |
41 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T55 |
30 |
|
T110 |
8 |
|
T111 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T55 |
28 |
|
T110 |
8 |
|
T111 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T55 |
38 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63293 |
1 |
|
|
T55 |
2294 |
|
T110 |
212 |
|
T111 |
1876 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42219 |
1 |
|
|
T55 |
911 |
|
T110 |
162 |
|
T111 |
1085 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62810 |
1 |
|
|
T55 |
1269 |
|
T110 |
591 |
|
T111 |
2194 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47995 |
1 |
|
|
T55 |
612 |
|
T110 |
1511 |
|
T111 |
861 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T55 |
36 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T55 |
36 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T55 |
36 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T55 |
30 |
|
T110 |
9 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
835 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T55 |
35 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T55 |
29 |
|
T110 |
9 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
835 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T55 |
34 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T55 |
34 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T55 |
28 |
|
T110 |
8 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T55 |
28 |
|
T110 |
8 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
824 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T55 |
27 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T55 |
26 |
|
T110 |
8 |
|
T111 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T55 |
32 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T55 |
25 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T55 |
31 |
|
T110 |
4 |
|
T111 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T55 |
31 |
|
T110 |
4 |
|
T111 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T55 |
28 |
|
T110 |
4 |
|
T111 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59024 |
1 |
|
|
T55 |
1466 |
|
T110 |
229 |
|
T111 |
2118 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46951 |
1 |
|
|
T55 |
744 |
|
T110 |
132 |
|
T111 |
1037 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
67092 |
1 |
|
|
T55 |
1543 |
|
T110 |
1956 |
|
T111 |
1760 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44349 |
1 |
|
|
T55 |
1380 |
|
T110 |
173 |
|
T111 |
1030 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T55 |
35 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T55 |
39 |
|
T110 |
6 |
|
T111 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T55 |
37 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T55 |
36 |
|
T110 |
5 |
|
T111 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T55 |
32 |
|
T110 |
5 |
|
T111 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T55 |
35 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T55 |
30 |
|
T110 |
5 |
|
T111 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T55 |
29 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T55 |
29 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T55 |
30 |
|
T110 |
4 |
|
T111 |
40 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62994 |
1 |
|
|
T55 |
1247 |
|
T110 |
293 |
|
T111 |
1265 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47021 |
1 |
|
|
T55 |
1457 |
|
T110 |
194 |
|
T111 |
2010 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57692 |
1 |
|
|
T55 |
1667 |
|
T110 |
218 |
|
T111 |
1473 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49135 |
1 |
|
|
T55 |
726 |
|
T110 |
1594 |
|
T111 |
1240 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T55 |
46 |
|
T110 |
13 |
|
T111 |
58 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1780 |
1 |
|
|
T55 |
42 |
|
T110 |
13 |
|
T111 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T55 |
45 |
|
T110 |
12 |
|
T111 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T55 |
44 |
|
T110 |
12 |
|
T111 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T55 |
43 |
|
T110 |
12 |
|
T111 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T55 |
43 |
|
T110 |
11 |
|
T111 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T55 |
38 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T55 |
39 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T55 |
35 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T55 |
35 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T55 |
35 |
|
T110 |
12 |
|
T111 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T55 |
34 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T55 |
35 |
|
T110 |
12 |
|
T111 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T55 |
34 |
|
T110 |
12 |
|
T111 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T55 |
33 |
|
T110 |
12 |
|
T111 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T55 |
32 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T55 |
33 |
|
T110 |
12 |
|
T111 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T55 |
30 |
|
T110 |
6 |
|
T111 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T55 |
31 |
|
T110 |
12 |
|
T111 |
40 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53971 |
1 |
|
|
T55 |
1815 |
|
T110 |
202 |
|
T111 |
2266 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43654 |
1 |
|
|
T55 |
1058 |
|
T110 |
302 |
|
T111 |
1221 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63292 |
1 |
|
|
T55 |
914 |
|
T110 |
145 |
|
T111 |
1538 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55630 |
1 |
|
|
T55 |
1079 |
|
T110 |
1685 |
|
T111 |
920 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T55 |
54 |
|
T110 |
17 |
|
T111 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1805 |
1 |
|
|
T55 |
55 |
|
T110 |
18 |
|
T111 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T55 |
53 |
|
T110 |
15 |
|
T111 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T55 |
54 |
|
T110 |
18 |
|
T111 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T55 |
53 |
|
T110 |
15 |
|
T111 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T55 |
53 |
|
T110 |
18 |
|
T111 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T55 |
53 |
|
T110 |
15 |
|
T111 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T55 |
53 |
|
T110 |
18 |
|
T111 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T55 |
52 |
|
T110 |
13 |
|
T111 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T55 |
53 |
|
T110 |
18 |
|
T111 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T55 |
50 |
|
T110 |
13 |
|
T111 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T55 |
52 |
|
T110 |
18 |
|
T111 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T55 |
48 |
|
T110 |
12 |
|
T111 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T55 |
51 |
|
T110 |
18 |
|
T111 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T55 |
48 |
|
T110 |
12 |
|
T111 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T55 |
51 |
|
T110 |
18 |
|
T111 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T55 |
46 |
|
T110 |
11 |
|
T111 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T55 |
48 |
|
T110 |
18 |
|
T111 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T55 |
46 |
|
T110 |
10 |
|
T111 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T55 |
46 |
|
T110 |
17 |
|
T111 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T55 |
45 |
|
T110 |
10 |
|
T111 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T55 |
46 |
|
T110 |
16 |
|
T111 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T55 |
44 |
|
T110 |
16 |
|
T111 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T55 |
44 |
|
T110 |
16 |
|
T111 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T55 |
44 |
|
T110 |
15 |
|
T111 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T55 |
36 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
15 |
|
T110 |
2 |
|
T111 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T55 |
42 |
|
T110 |
15 |
|
T111 |
36 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60739 |
1 |
|
|
T55 |
1436 |
|
T110 |
1669 |
|
T111 |
2292 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42826 |
1 |
|
|
T55 |
811 |
|
T110 |
184 |
|
T111 |
1229 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60870 |
1 |
|
|
T55 |
1437 |
|
T110 |
404 |
|
T111 |
1712 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54032 |
1 |
|
|
T55 |
1483 |
|
T110 |
117 |
|
T111 |
777 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
8 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T55 |
38 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T55 |
36 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
8 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
8 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T55 |
34 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
8 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T55 |
28 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T55 |
27 |
|
T110 |
8 |
|
T111 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55170 |
1 |
|
|
T55 |
1246 |
|
T110 |
307 |
|
T111 |
2056 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48151 |
1 |
|
|
T55 |
1687 |
|
T110 |
161 |
|
T111 |
1150 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65867 |
1 |
|
|
T55 |
1239 |
|
T110 |
1641 |
|
T111 |
1683 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48030 |
1 |
|
|
T55 |
950 |
|
T110 |
285 |
|
T111 |
1010 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T55 |
47 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T55 |
44 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T55 |
40 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T55 |
44 |
|
T110 |
9 |
|
T111 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T55 |
40 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T55 |
44 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T55 |
39 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T55 |
44 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T55 |
36 |
|
T110 |
9 |
|
T111 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
15 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T55 |
34 |
|
T110 |
8 |
|
T111 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T55 |
40 |
|
T110 |
7 |
|
T111 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T55 |
34 |
|
T110 |
8 |
|
T111 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T55 |
40 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T55 |
40 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
14 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T55 |
30 |
|
T110 |
8 |
|
T111 |
40 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58324 |
1 |
|
|
T55 |
1978 |
|
T110 |
271 |
|
T111 |
2365 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47028 |
1 |
|
|
T55 |
687 |
|
T110 |
188 |
|
T111 |
1158 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61487 |
1 |
|
|
T55 |
1897 |
|
T110 |
254 |
|
T111 |
1475 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49308 |
1 |
|
|
T55 |
590 |
|
T110 |
1701 |
|
T111 |
982 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1800 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1796 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T55 |
37 |
|
T110 |
12 |
|
T111 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T55 |
30 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T55 |
37 |
|
T110 |
12 |
|
T111 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T55 |
32 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T55 |
32 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T55 |
29 |
|
T110 |
11 |
|
T111 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T55 |
28 |
|
T110 |
11 |
|
T111 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T55 |
28 |
|
T110 |
11 |
|
T111 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T55 |
27 |
|
T110 |
11 |
|
T111 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T55 |
27 |
|
T110 |
11 |
|
T111 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T55 |
27 |
|
T110 |
11 |
|
T111 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T55 |
26 |
|
T110 |
6 |
|
T111 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T55 |
26 |
|
T110 |
11 |
|
T111 |
34 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62063 |
1 |
|
|
T55 |
885 |
|
T110 |
276 |
|
T111 |
1371 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46998 |
1 |
|
|
T55 |
1806 |
|
T110 |
1457 |
|
T111 |
1267 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58456 |
1 |
|
|
T55 |
1191 |
|
T110 |
297 |
|
T111 |
1275 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50771 |
1 |
|
|
T55 |
1138 |
|
T110 |
308 |
|
T111 |
1888 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T55 |
53 |
|
T110 |
14 |
|
T111 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T55 |
52 |
|
T110 |
13 |
|
T111 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T55 |
52 |
|
T110 |
13 |
|
T111 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T55 |
52 |
|
T110 |
13 |
|
T111 |
58 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T55 |
52 |
|
T110 |
13 |
|
T111 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T55 |
50 |
|
T110 |
13 |
|
T111 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T55 |
50 |
|
T110 |
12 |
|
T111 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T55 |
50 |
|
T110 |
12 |
|
T111 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T55 |
49 |
|
T110 |
12 |
|
T111 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T55 |
49 |
|
T110 |
12 |
|
T111 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T55 |
49 |
|
T110 |
12 |
|
T111 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T55 |
45 |
|
T110 |
12 |
|
T111 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T55 |
49 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T55 |
45 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T55 |
47 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T55 |
43 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T55 |
42 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T55 |
42 |
|
T110 |
11 |
|
T111 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T55 |
39 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T55 |
40 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T55 |
36 |
|
T110 |
12 |
|
T111 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T55 |
36 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T55 |
14 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T55 |
35 |
|
T110 |
12 |
|
T111 |
47 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58217 |
1 |
|
|
T55 |
2049 |
|
T110 |
206 |
|
T111 |
1533 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51979 |
1 |
|
|
T55 |
932 |
|
T110 |
305 |
|
T111 |
1135 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62504 |
1 |
|
|
T55 |
793 |
|
T110 |
1741 |
|
T111 |
1844 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44841 |
1 |
|
|
T55 |
1098 |
|
T110 |
190 |
|
T111 |
1500 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T55 |
51 |
|
T110 |
9 |
|
T111 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1797 |
1 |
|
|
T55 |
54 |
|
T110 |
8 |
|
T111 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T55 |
50 |
|
T110 |
9 |
|
T111 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T55 |
54 |
|
T110 |
8 |
|
T111 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T55 |
49 |
|
T110 |
9 |
|
T111 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T55 |
50 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T55 |
47 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T55 |
50 |
|
T110 |
8 |
|
T111 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T55 |
45 |
|
T110 |
9 |
|
T111 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T55 |
48 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T55 |
45 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T55 |
47 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T55 |
45 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T55 |
47 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T55 |
47 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T55 |
45 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T55 |
44 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T55 |
43 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T55 |
43 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T55 |
38 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T55 |
41 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T55 |
36 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T55 |
40 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T55 |
20 |
|
T110 |
5 |
|
T111 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T55 |
40 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55512 |
1 |
|
|
T55 |
1090 |
|
T110 |
251 |
|
T111 |
2042 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51353 |
1 |
|
|
T55 |
1400 |
|
T110 |
1429 |
|
T111 |
977 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60614 |
1 |
|
|
T55 |
992 |
|
T110 |
436 |
|
T111 |
1237 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49869 |
1 |
|
|
T55 |
1508 |
|
T110 |
280 |
|
T111 |
1449 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T55 |
49 |
|
T110 |
11 |
|
T111 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T55 |
46 |
|
T110 |
9 |
|
T111 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T55 |
49 |
|
T110 |
11 |
|
T111 |
61 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1780 |
1 |
|
|
T55 |
45 |
|
T110 |
8 |
|
T111 |
67 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T55 |
48 |
|
T110 |
11 |
|
T111 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T55 |
44 |
|
T110 |
8 |
|
T111 |
67 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T55 |
47 |
|
T110 |
11 |
|
T111 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T55 |
44 |
|
T110 |
8 |
|
T111 |
66 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T55 |
47 |
|
T110 |
10 |
|
T111 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T55 |
44 |
|
T110 |
8 |
|
T111 |
65 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
64 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
62 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
62 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T55 |
38 |
|
T110 |
8 |
|
T111 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T55 |
32 |
|
T110 |
7 |
|
T111 |
56 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58948 |
1 |
|
|
T55 |
1388 |
|
T110 |
256 |
|
T111 |
1480 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46187 |
1 |
|
|
T55 |
710 |
|
T110 |
295 |
|
T111 |
1622 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63890 |
1 |
|
|
T55 |
2071 |
|
T110 |
1609 |
|
T111 |
1622 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49835 |
1 |
|
|
T55 |
975 |
|
T110 |
294 |
|
T111 |
1371 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T55 |
33 |
|
T110 |
8 |
|
T111 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T55 |
30 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T55 |
35 |
|
T110 |
10 |
|
T111 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T55 |
28 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T55 |
25 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T55 |
25 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T55 |
25 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
41 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53192 |
1 |
|
|
T55 |
847 |
|
T110 |
350 |
|
T111 |
1847 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47755 |
1 |
|
|
T55 |
1055 |
|
T110 |
1475 |
|
T111 |
975 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61988 |
1 |
|
|
T55 |
1738 |
|
T110 |
369 |
|
T111 |
1812 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53070 |
1 |
|
|
T55 |
1355 |
|
T110 |
170 |
|
T111 |
1396 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1841 |
1 |
|
|
T55 |
50 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1846 |
1 |
|
|
T55 |
54 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1810 |
1 |
|
|
T55 |
49 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1808 |
1 |
|
|
T55 |
53 |
|
T110 |
7 |
|
T111 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T55 |
45 |
|
T110 |
11 |
|
T111 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T55 |
53 |
|
T110 |
7 |
|
T111 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T55 |
16 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T55 |
44 |
|
T110 |
10 |
|
T111 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T55 |
53 |
|
T110 |
7 |
|
T111 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T55 |
52 |
|
T110 |
7 |
|
T111 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T55 |
52 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T55 |
51 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T55 |
39 |
|
T110 |
9 |
|
T111 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T55 |
38 |
|
T110 |
9 |
|
T111 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T55 |
37 |
|
T110 |
8 |
|
T111 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T55 |
48 |
|
T110 |
6 |
|
T111 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T55 |
47 |
|
T110 |
6 |
|
T111 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T55 |
47 |
|
T110 |
6 |
|
T111 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T55 |
15 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T55 |
34 |
|
T110 |
8 |
|
T111 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T55 |
47 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57891 |
1 |
|
|
T55 |
1078 |
|
T110 |
204 |
|
T111 |
981 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52466 |
1 |
|
|
T55 |
1076 |
|
T110 |
1476 |
|
T111 |
1398 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59228 |
1 |
|
|
T55 |
1215 |
|
T110 |
375 |
|
T111 |
1108 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47599 |
1 |
|
|
T55 |
1550 |
|
T110 |
353 |
|
T111 |
2192 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T55 |
52 |
|
T110 |
11 |
|
T111 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T55 |
48 |
|
T110 |
12 |
|
T111 |
72 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T55 |
51 |
|
T110 |
11 |
|
T111 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1747 |
1 |
|
|
T55 |
48 |
|
T110 |
11 |
|
T111 |
72 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T55 |
51 |
|
T110 |
11 |
|
T111 |
68 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T55 |
47 |
|
T110 |
11 |
|
T111 |
70 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
6 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T55 |
51 |
|
T110 |
10 |
|
T111 |
66 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T55 |
46 |
|
T110 |
11 |
|
T111 |
67 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T55 |
50 |
|
T110 |
9 |
|
T111 |
65 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T55 |
46 |
|
T110 |
11 |
|
T111 |
62 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T55 |
49 |
|
T110 |
9 |
|
T111 |
64 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T55 |
46 |
|
T110 |
11 |
|
T111 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T55 |
48 |
|
T110 |
9 |
|
T111 |
64 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T55 |
46 |
|
T110 |
9 |
|
T111 |
62 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T55 |
46 |
|
T110 |
8 |
|
T111 |
59 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T55 |
42 |
|
T110 |
11 |
|
T111 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T55 |
45 |
|
T110 |
8 |
|
T111 |
59 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T55 |
40 |
|
T110 |
11 |
|
T111 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T55 |
43 |
|
T110 |
7 |
|
T111 |
59 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T55 |
43 |
|
T110 |
7 |
|
T111 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T55 |
39 |
|
T110 |
6 |
|
T111 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T55 |
39 |
|
T110 |
6 |
|
T111 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T55 |
35 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
15 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
20 |
|
T110 |
4 |
|
T111 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T55 |
35 |
|
T110 |
11 |
|
T111 |
48 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59632 |
1 |
|
|
T55 |
1621 |
|
T110 |
1547 |
|
T111 |
1789 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49062 |
1 |
|
|
T55 |
1504 |
|
T110 |
119 |
|
T111 |
887 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61152 |
1 |
|
|
T55 |
1258 |
|
T110 |
413 |
|
T111 |
2611 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48583 |
1 |
|
|
T55 |
687 |
|
T110 |
355 |
|
T111 |
762 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
23 |
|
T110 |
4 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T55 |
40 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
23 |
|
T110 |
4 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T55 |
39 |
|
T110 |
13 |
|
T111 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T55 |
40 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
23 |
|
T110 |
4 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T55 |
39 |
|
T110 |
12 |
|
T111 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T55 |
39 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
23 |
|
T110 |
4 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T55 |
36 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T55 |
36 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T55 |
32 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T55 |
29 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
32 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64379 |
1 |
|
|
T55 |
1154 |
|
T110 |
1610 |
|
T111 |
2090 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45454 |
1 |
|
|
T55 |
870 |
|
T110 |
228 |
|
T111 |
780 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62575 |
1 |
|
|
T55 |
1518 |
|
T110 |
352 |
|
T111 |
1942 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45932 |
1 |
|
|
T55 |
1621 |
|
T110 |
259 |
|
T111 |
1323 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T55 |
45 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T55 |
45 |
|
T110 |
10 |
|
T111 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T55 |
38 |
|
T110 |
8 |
|
T111 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T55 |
20 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T55 |
32 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T55 |
40 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T55 |
40 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T55 |
40 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T55 |
39 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T55 |
28 |
|
T110 |
7 |
|
T111 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T55 |
38 |
|
T110 |
10 |
|
T111 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T55 |
28 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T55 |
37 |
|
T110 |
10 |
|
T111 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T55 |
28 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
15 |
|
T110 |
3 |
|
T111 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T55 |
36 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57776 |
1 |
|
|
T55 |
1201 |
|
T110 |
227 |
|
T111 |
942 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47592 |
1 |
|
|
T55 |
1386 |
|
T110 |
1582 |
|
T111 |
1150 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63468 |
1 |
|
|
T55 |
784 |
|
T110 |
263 |
|
T111 |
2599 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48194 |
1 |
|
|
T55 |
1629 |
|
T110 |
366 |
|
T111 |
1260 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T55 |
48 |
|
T110 |
9 |
|
T111 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T55 |
48 |
|
T110 |
11 |
|
T111 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T55 |
47 |
|
T110 |
9 |
|
T111 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T55 |
45 |
|
T110 |
11 |
|
T111 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T55 |
46 |
|
T110 |
9 |
|
T111 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
17 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T55 |
45 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T55 |
44 |
|
T110 |
8 |
|
T111 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T55 |
43 |
|
T110 |
8 |
|
T111 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T55 |
42 |
|
T110 |
8 |
|
T111 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T55 |
44 |
|
T110 |
11 |
|
T111 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T55 |
44 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T55 |
43 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T55 |
39 |
|
T110 |
10 |
|
T111 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T55 |
16 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T55 |
36 |
|
T110 |
9 |
|
T111 |
38 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59916 |
1 |
|
|
T55 |
1302 |
|
T110 |
1789 |
|
T111 |
1768 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45224 |
1 |
|
|
T55 |
1163 |
|
T110 |
71 |
|
T111 |
1780 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57471 |
1 |
|
|
T55 |
1199 |
|
T110 |
635 |
|
T111 |
1344 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55740 |
1 |
|
|
T55 |
1384 |
|
T110 |
61 |
|
T111 |
1104 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T55 |
38 |
|
T110 |
2 |
|
T111 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T55 |
40 |
|
T110 |
3 |
|
T111 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T55 |
38 |
|
T110 |
2 |
|
T111 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T55 |
40 |
|
T110 |
3 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T55 |
38 |
|
T110 |
2 |
|
T111 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T55 |
38 |
|
T110 |
3 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T55 |
24 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T55 |
38 |
|
T110 |
2 |
|
T111 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T55 |
37 |
|
T110 |
3 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T55 |
37 |
|
T110 |
2 |
|
T111 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T55 |
35 |
|
T110 |
3 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T55 |
35 |
|
T110 |
3 |
|
T111 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T55 |
35 |
|
T110 |
3 |
|
T111 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T55 |
34 |
|
T110 |
3 |
|
T111 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T55 |
34 |
|
T110 |
3 |
|
T111 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T55 |
34 |
|
T110 |
3 |
|
T111 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T55 |
32 |
|
T110 |
3 |
|
T111 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T55 |
29 |
|
T110 |
3 |
|
T111 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T55 |
36 |
|
T110 |
2 |
|
T111 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T55 |
27 |
|
T110 |
3 |
|
T111 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T55 |
35 |
|
T110 |
2 |
|
T111 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T55 |
27 |
|
T110 |
3 |
|
T111 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T55 |
23 |
|
T110 |
8 |
|
T111 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T55 |
35 |
|
T110 |
2 |
|
T111 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T55 |
25 |
|
T110 |
2 |
|
T111 |
36 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61626 |
1 |
|
|
T55 |
1005 |
|
T110 |
294 |
|
T111 |
1671 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47820 |
1 |
|
|
T55 |
1628 |
|
T110 |
436 |
|
T111 |
993 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61338 |
1 |
|
|
T55 |
1619 |
|
T110 |
121 |
|
T111 |
2510 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47655 |
1 |
|
|
T55 |
843 |
|
T110 |
1488 |
|
T111 |
760 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T55 |
18 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T55 |
44 |
|
T110 |
16 |
|
T111 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T55 |
43 |
|
T110 |
14 |
|
T111 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T55 |
18 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T55 |
43 |
|
T110 |
16 |
|
T111 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T55 |
42 |
|
T110 |
14 |
|
T111 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T55 |
18 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T55 |
43 |
|
T110 |
15 |
|
T111 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T55 |
41 |
|
T110 |
13 |
|
T111 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T55 |
18 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T55 |
42 |
|
T110 |
15 |
|
T111 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T55 |
42 |
|
T110 |
15 |
|
T111 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T55 |
39 |
|
T110 |
12 |
|
T111 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T55 |
42 |
|
T110 |
15 |
|
T111 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T55 |
42 |
|
T110 |
15 |
|
T111 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T55 |
42 |
|
T110 |
14 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T55 |
35 |
|
T110 |
11 |
|
T111 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T55 |
41 |
|
T110 |
14 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T55 |
39 |
|
T110 |
13 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T55 |
33 |
|
T110 |
10 |
|
T111 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T55 |
38 |
|
T110 |
13 |
|
T111 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T55 |
32 |
|
T110 |
10 |
|
T111 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T55 |
38 |
|
T110 |
13 |
|
T111 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T55 |
31 |
|
T110 |
10 |
|
T111 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T55 |
38 |
|
T110 |
13 |
|
T111 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T55 |
38 |
|
T110 |
13 |
|
T111 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T55 |
18 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T55 |
30 |
|
T110 |
9 |
|
T111 |
33 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57528 |
1 |
|
|
T55 |
1427 |
|
T110 |
213 |
|
T111 |
1439 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47973 |
1 |
|
|
T55 |
714 |
|
T110 |
1615 |
|
T111 |
1307 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63619 |
1 |
|
|
T55 |
2490 |
|
T110 |
234 |
|
T111 |
1340 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48318 |
1 |
|
|
T55 |
610 |
|
T110 |
217 |
|
T111 |
1782 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T55 |
29 |
|
T110 |
4 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T55 |
27 |
|
T110 |
17 |
|
T111 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T55 |
33 |
|
T110 |
15 |
|
T111 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T55 |
29 |
|
T110 |
4 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T55 |
27 |
|
T110 |
17 |
|
T111 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T55 |
32 |
|
T110 |
15 |
|
T111 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T55 |
29 |
|
T110 |
4 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T55 |
25 |
|
T110 |
17 |
|
T111 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T55 |
32 |
|
T110 |
15 |
|
T111 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T55 |
29 |
|
T110 |
4 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T55 |
25 |
|
T110 |
17 |
|
T111 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T55 |
31 |
|
T110 |
15 |
|
T111 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T55 |
26 |
|
T110 |
17 |
|
T111 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T55 |
28 |
|
T110 |
15 |
|
T111 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T55 |
26 |
|
T110 |
17 |
|
T111 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T55 |
28 |
|
T110 |
15 |
|
T111 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T55 |
24 |
|
T110 |
16 |
|
T111 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T55 |
28 |
|
T110 |
15 |
|
T111 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T55 |
24 |
|
T110 |
16 |
|
T111 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T55 |
27 |
|
T110 |
15 |
|
T111 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T55 |
24 |
|
T110 |
15 |
|
T111 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T55 |
26 |
|
T110 |
15 |
|
T111 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T55 |
24 |
|
T110 |
14 |
|
T111 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T55 |
25 |
|
T110 |
15 |
|
T111 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T55 |
23 |
|
T110 |
14 |
|
T111 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T55 |
25 |
|
T110 |
14 |
|
T111 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T55 |
21 |
|
T110 |
14 |
|
T111 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T55 |
24 |
|
T110 |
12 |
|
T111 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T55 |
21 |
|
T110 |
14 |
|
T111 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T55 |
24 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T55 |
21 |
|
T110 |
13 |
|
T111 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T55 |
28 |
|
T110 |
3 |
|
T111 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T55 |
21 |
|
T110 |
13 |
|
T111 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T55 |
21 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61591 |
1 |
|
|
T55 |
2061 |
|
T110 |
292 |
|
T111 |
1644 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45176 |
1 |
|
|
T55 |
1032 |
|
T110 |
144 |
|
T111 |
1252 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65128 |
1 |
|
|
T55 |
1139 |
|
T110 |
1717 |
|
T111 |
1617 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45589 |
1 |
|
|
T55 |
883 |
|
T110 |
186 |
|
T111 |
1598 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
17 |
|
T110 |
9 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
17 |
|
T110 |
9 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T55 |
43 |
|
T110 |
9 |
|
T111 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
17 |
|
T110 |
9 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
17 |
|
T110 |
9 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T55 |
42 |
|
T110 |
9 |
|
T111 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T55 |
17 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T55 |
37 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T55 |
17 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T55 |
34 |
|
T110 |
11 |
|
T111 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
17 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T55 |
34 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
17 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T55 |
39 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T55 |
38 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T55 |
29 |
|
T110 |
9 |
|
T111 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T55 |
36 |
|
T110 |
5 |
|
T111 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T55 |
20 |
|
T110 |
7 |
|
T111 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T55 |
28 |
|
T110 |
9 |
|
T111 |
37 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62668 |
1 |
|
|
T55 |
1212 |
|
T110 |
264 |
|
T111 |
2047 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46641 |
1 |
|
|
T55 |
1985 |
|
T110 |
1595 |
|
T111 |
1248 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60099 |
1 |
|
|
T55 |
1310 |
|
T110 |
316 |
|
T111 |
1252 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48502 |
1 |
|
|
T55 |
723 |
|
T110 |
248 |
|
T111 |
1314 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
15 |
|
T110 |
4 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T55 |
44 |
|
T110 |
12 |
|
T111 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T55 |
37 |
|
T110 |
10 |
|
T111 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
15 |
|
T110 |
4 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T55 |
44 |
|
T110 |
12 |
|
T111 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T55 |
34 |
|
T110 |
10 |
|
T111 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
15 |
|
T110 |
4 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T55 |
43 |
|
T110 |
12 |
|
T111 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T55 |
32 |
|
T110 |
10 |
|
T111 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
15 |
|
T110 |
4 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T55 |
42 |
|
T110 |
11 |
|
T111 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
31 |
|
T110 |
10 |
|
T111 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T55 |
42 |
|
T110 |
11 |
|
T111 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T55 |
30 |
|
T110 |
10 |
|
T111 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T55 |
42 |
|
T110 |
10 |
|
T111 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T55 |
29 |
|
T110 |
10 |
|
T111 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T55 |
29 |
|
T110 |
10 |
|
T111 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T55 |
29 |
|
T110 |
10 |
|
T111 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T55 |
41 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T55 |
27 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T55 |
37 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T55 |
26 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T55 |
26 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T55 |
25 |
|
T110 |
10 |
|
T111 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T55 |
24 |
|
T110 |
10 |
|
T111 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
14 |
|
T110 |
3 |
|
T111 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T55 |
35 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T55 |
21 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
43 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61301 |
1 |
|
|
T55 |
1577 |
|
T110 |
267 |
|
T111 |
1616 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46532 |
1 |
|
|
T55 |
994 |
|
T110 |
400 |
|
T111 |
1128 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55076 |
1 |
|
|
T55 |
974 |
|
T110 |
1518 |
|
T111 |
1471 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53456 |
1 |
|
|
T55 |
1498 |
|
T110 |
188 |
|
T111 |
1840 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1796 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1828 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T55 |
39 |
|
T110 |
12 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T55 |
38 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T55 |
34 |
|
T110 |
10 |
|
T111 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T55 |
35 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T55 |
33 |
|
T110 |
10 |
|
T111 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T55 |
35 |
|
T110 |
11 |
|
T111 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T55 |
33 |
|
T110 |
8 |
|
T111 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T55 |
34 |
|
T110 |
11 |
|
T111 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T55 |
30 |
|
T110 |
8 |
|
T111 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T55 |
34 |
|
T110 |
11 |
|
T111 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T55 |
30 |
|
T110 |
8 |
|
T111 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T55 |
29 |
|
T110 |
8 |
|
T111 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T55 |
31 |
|
T110 |
11 |
|
T111 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T55 |
28 |
|
T110 |
8 |
|
T111 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
4 |
|
T111 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T55 |
29 |
|
T110 |
11 |
|
T111 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T55 |
26 |
|
T110 |
8 |
|
T111 |
37 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59418 |
1 |
|
|
T55 |
1289 |
|
T110 |
1722 |
|
T111 |
1712 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46807 |
1 |
|
|
T55 |
1015 |
|
T110 |
156 |
|
T111 |
1282 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60246 |
1 |
|
|
T55 |
1582 |
|
T110 |
334 |
|
T111 |
1483 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50245 |
1 |
|
|
T55 |
1195 |
|
T110 |
185 |
|
T111 |
1590 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1786 |
1 |
|
|
T55 |
51 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T55 |
47 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T55 |
50 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T55 |
44 |
|
T110 |
7 |
|
T111 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T55 |
50 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T55 |
43 |
|
T110 |
7 |
|
T111 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T55 |
12 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T55 |
49 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T55 |
41 |
|
T110 |
7 |
|
T111 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T55 |
50 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T55 |
41 |
|
T110 |
7 |
|
T111 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T55 |
50 |
|
T110 |
7 |
|
T111 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T55 |
41 |
|
T110 |
7 |
|
T111 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T55 |
50 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T55 |
49 |
|
T110 |
6 |
|
T111 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T55 |
37 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T55 |
48 |
|
T110 |
6 |
|
T111 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T55 |
37 |
|
T110 |
6 |
|
T111 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T55 |
46 |
|
T110 |
6 |
|
T111 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T55 |
34 |
|
T110 |
6 |
|
T111 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T55 |
45 |
|
T110 |
6 |
|
T111 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T55 |
44 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T55 |
43 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T55 |
11 |
|
T110 |
9 |
|
T111 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T55 |
41 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T55 |
16 |
|
T110 |
8 |
|
T111 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T55 |
30 |
|
T110 |
5 |
|
T111 |
34 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58966 |
1 |
|
|
T55 |
2179 |
|
T110 |
178 |
|
T111 |
1390 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49078 |
1 |
|
|
T55 |
815 |
|
T110 |
1623 |
|
T111 |
1284 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61561 |
1 |
|
|
T55 |
1103 |
|
T110 |
304 |
|
T111 |
1674 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46796 |
1 |
|
|
T55 |
1009 |
|
T110 |
209 |
|
T111 |
1291 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1786 |
1 |
|
|
T55 |
40 |
|
T110 |
14 |
|
T111 |
66 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T55 |
41 |
|
T110 |
13 |
|
T111 |
69 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T55 |
39 |
|
T110 |
14 |
|
T111 |
66 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
68 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T55 |
38 |
|
T110 |
14 |
|
T111 |
66 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
66 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T55 |
38 |
|
T110 |
13 |
|
T111 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
66 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T55 |
40 |
|
T110 |
13 |
|
T111 |
65 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T55 |
38 |
|
T110 |
12 |
|
T111 |
62 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T55 |
37 |
|
T110 |
13 |
|
T111 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T55 |
36 |
|
T110 |
12 |
|
T111 |
61 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T55 |
36 |
|
T110 |
12 |
|
T111 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T55 |
36 |
|
T110 |
12 |
|
T111 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
59 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T55 |
36 |
|
T110 |
11 |
|
T111 |
58 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T55 |
33 |
|
T110 |
10 |
|
T111 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T55 |
32 |
|
T110 |
10 |
|
T111 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T55 |
35 |
|
T110 |
10 |
|
T111 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T55 |
30 |
|
T110 |
10 |
|
T111 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T55 |
33 |
|
T110 |
10 |
|
T111 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T55 |
30 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T55 |
32 |
|
T110 |
10 |
|
T111 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T55 |
30 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T55 |
21 |
|
T110 |
6 |
|
T111 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T55 |
32 |
|
T110 |
10 |
|
T111 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T55 |
29 |
|
T110 |
9 |
|
T111 |
46 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53407 |
1 |
|
|
T55 |
1165 |
|
T110 |
1572 |
|
T111 |
1303 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51619 |
1 |
|
|
T55 |
1402 |
|
T110 |
170 |
|
T111 |
1876 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56640 |
1 |
|
|
T55 |
1700 |
|
T110 |
247 |
|
T111 |
1640 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55371 |
1 |
|
|
T55 |
777 |
|
T110 |
387 |
|
T111 |
1303 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T55 |
40 |
|
T110 |
12 |
|
T111 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T55 |
41 |
|
T110 |
12 |
|
T111 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T55 |
39 |
|
T110 |
11 |
|
T111 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T55 |
41 |
|
T110 |
10 |
|
T111 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T55 |
37 |
|
T110 |
10 |
|
T111 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T55 |
39 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T55 |
37 |
|
T110 |
10 |
|
T111 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T55 |
37 |
|
T110 |
10 |
|
T111 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T55 |
36 |
|
T110 |
10 |
|
T111 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T55 |
36 |
|
T110 |
9 |
|
T111 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T55 |
35 |
|
T110 |
10 |
|
T111 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T55 |
35 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T55 |
33 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T55 |
34 |
|
T110 |
9 |
|
T111 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T55 |
30 |
|
T110 |
9 |
|
T111 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T55 |
31 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T55 |
29 |
|
T110 |
9 |
|
T111 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T55 |
22 |
|
T110 |
6 |
|
T111 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T55 |
28 |
|
T110 |
9 |
|
T111 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T55 |
22 |
|
T110 |
5 |
|
T111 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T55 |
31 |
|
T110 |
8 |
|
T111 |
37 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64362 |
1 |
|
|
T55 |
2308 |
|
T110 |
281 |
|
T111 |
1390 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50742 |
1 |
|
|
T55 |
1046 |
|
T110 |
1670 |
|
T111 |
1716 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56509 |
1 |
|
|
T55 |
1056 |
|
T110 |
112 |
|
T111 |
1629 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44327 |
1 |
|
|
T55 |
770 |
|
T110 |
264 |
|
T111 |
1106 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1799 |
1 |
|
|
T55 |
43 |
|
T110 |
15 |
|
T111 |
66 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1798 |
1 |
|
|
T55 |
36 |
|
T110 |
14 |
|
T111 |
64 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T55 |
41 |
|
T110 |
15 |
|
T111 |
66 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T55 |
36 |
|
T110 |
13 |
|
T111 |
60 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T55 |
38 |
|
T110 |
15 |
|
T111 |
65 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T55 |
33 |
|
T110 |
12 |
|
T111 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T55 |
37 |
|
T110 |
15 |
|
T111 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T55 |
36 |
|
T110 |
15 |
|
T111 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T55 |
33 |
|
T110 |
11 |
|
T111 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T55 |
35 |
|
T110 |
15 |
|
T111 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T55 |
35 |
|
T110 |
15 |
|
T111 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T55 |
35 |
|
T110 |
15 |
|
T111 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T55 |
32 |
|
T110 |
9 |
|
T111 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T55 |
35 |
|
T110 |
15 |
|
T111 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T55 |
33 |
|
T110 |
15 |
|
T111 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T55 |
32 |
|
T110 |
8 |
|
T111 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T55 |
33 |
|
T110 |
15 |
|
T111 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T55 |
30 |
|
T110 |
7 |
|
T111 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T55 |
30 |
|
T110 |
15 |
|
T111 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T55 |
30 |
|
T110 |
7 |
|
T111 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T55 |
29 |
|
T110 |
15 |
|
T111 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T55 |
29 |
|
T110 |
15 |
|
T111 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T55 |
17 |
|
T110 |
5 |
|
T111 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T55 |
29 |
|
T110 |
15 |
|
T111 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T55 |
23 |
|
T110 |
5 |
|
T111 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T55 |
29 |
|
T110 |
6 |
|
T111 |
47 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62340 |
1 |
|
|
T55 |
1918 |
|
T110 |
1720 |
|
T111 |
2239 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48565 |
1 |
|
|
T55 |
1351 |
|
T110 |
119 |
|
T111 |
735 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56804 |
1 |
|
|
T55 |
1172 |
|
T110 |
255 |
|
T111 |
2291 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49690 |
1 |
|
|
T55 |
939 |
|
T110 |
261 |
|
T111 |
864 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
24 |
|
T110 |
11 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T55 |
27 |
|
T110 |
7 |
|
T111 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
24 |
|
T110 |
11 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T55 |
25 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
24 |
|
T110 |
11 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T55 |
24 |
|
T110 |
11 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T55 |
26 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T55 |
25 |
|
T110 |
7 |
|
T111 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T55 |
25 |
|
T110 |
6 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T55 |
25 |
|
T110 |
5 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T55 |
24 |
|
T110 |
5 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T55 |
24 |
|
T110 |
4 |
|
T111 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T55 |
24 |
|
T110 |
7 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T55 |
24 |
|
T110 |
4 |
|
T111 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T55 |
22 |
|
T110 |
7 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T55 |
24 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T55 |
23 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T55 |
22 |
|
T110 |
4 |
|
T111 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T55 |
21 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T55 |
23 |
|
T110 |
10 |
|
T111 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T55 |
22 |
|
T110 |
3 |
|
T111 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T55 |
19 |
|
T110 |
7 |
|
T111 |
29 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63908 |
1 |
|
|
T55 |
1279 |
|
T110 |
322 |
|
T111 |
1696 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43199 |
1 |
|
|
T55 |
714 |
|
T110 |
1585 |
|
T111 |
1043 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65258 |
1 |
|
|
T55 |
1532 |
|
T110 |
399 |
|
T111 |
1170 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45497 |
1 |
|
|
T55 |
1629 |
|
T110 |
149 |
|
T111 |
1924 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T55 |
41 |
|
T110 |
8 |
|
T111 |
58 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T55 |
42 |
|
T110 |
6 |
|
T111 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T55 |
40 |
|
T110 |
8 |
|
T111 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T55 |
42 |
|
T110 |
6 |
|
T111 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T55 |
38 |
|
T110 |
8 |
|
T111 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T55 |
41 |
|
T110 |
6 |
|
T111 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
19 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T55 |
36 |
|
T110 |
8 |
|
T111 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T55 |
41 |
|
T110 |
6 |
|
T111 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T55 |
35 |
|
T110 |
8 |
|
T111 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T55 |
34 |
|
T110 |
7 |
|
T111 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T55 |
32 |
|
T110 |
7 |
|
T111 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T55 |
31 |
|
T110 |
7 |
|
T111 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T55 |
40 |
|
T110 |
6 |
|
T111 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T55 |
38 |
|
T110 |
6 |
|
T111 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T55 |
29 |
|
T110 |
7 |
|
T111 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T55 |
36 |
|
T110 |
5 |
|
T111 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T55 |
28 |
|
T110 |
6 |
|
T111 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T55 |
36 |
|
T110 |
4 |
|
T111 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T55 |
27 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T55 |
36 |
|
T110 |
4 |
|
T111 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T55 |
18 |
|
T110 |
6 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T55 |
24 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T55 |
18 |
|
T110 |
7 |
|
T111 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T55 |
34 |
|
T110 |
4 |
|
T111 |
44 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62060 |
1 |
|
|
T55 |
827 |
|
T110 |
1742 |
|
T111 |
1633 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45892 |
1 |
|
|
T55 |
2101 |
|
T110 |
375 |
|
T111 |
1564 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59545 |
1 |
|
|
T55 |
1000 |
|
T110 |
225 |
|
T111 |
1647 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49846 |
1 |
|
|
T55 |
904 |
|
T110 |
138 |
|
T111 |
1134 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T55 |
56 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1732 |
1 |
|
|
T55 |
55 |
|
T110 |
9 |
|
T111 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T55 |
55 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T55 |
52 |
|
T110 |
8 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T55 |
54 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T55 |
52 |
|
T110 |
7 |
|
T111 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T55 |
17 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T55 |
53 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T55 |
48 |
|
T110 |
7 |
|
T111 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T55 |
53 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T55 |
47 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T55 |
52 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T55 |
46 |
|
T110 |
7 |
|
T111 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T55 |
52 |
|
T110 |
11 |
|
T111 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T55 |
46 |
|
T110 |
6 |
|
T111 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T55 |
52 |
|
T110 |
11 |
|
T111 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T55 |
45 |
|
T110 |
6 |
|
T111 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T55 |
50 |
|
T110 |
11 |
|
T111 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T55 |
45 |
|
T110 |
6 |
|
T111 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T55 |
50 |
|
T110 |
11 |
|
T111 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T55 |
44 |
|
T110 |
5 |
|
T111 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T55 |
50 |
|
T110 |
11 |
|
T111 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T55 |
42 |
|
T110 |
5 |
|
T111 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T55 |
49 |
|
T110 |
11 |
|
T111 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T55 |
42 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T55 |
48 |
|
T110 |
11 |
|
T111 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T55 |
41 |
|
T110 |
5 |
|
T111 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T55 |
47 |
|
T110 |
11 |
|
T111 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T55 |
37 |
|
T110 |
4 |
|
T111 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T55 |
16 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T55 |
47 |
|
T110 |
10 |
|
T111 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T55 |
17 |
|
T110 |
4 |
|
T111 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T55 |
35 |
|
T110 |
4 |
|
T111 |
32 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61843 |
1 |
|
|
T55 |
1363 |
|
T110 |
1634 |
|
T111 |
1728 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47437 |
1 |
|
|
T55 |
1543 |
|
T110 |
68 |
|
T111 |
950 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56399 |
1 |
|
|
T55 |
1346 |
|
T110 |
491 |
|
T111 |
1398 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51502 |
1 |
|
|
T55 |
861 |
|
T110 |
187 |
|
T111 |
1912 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T55 |
37 |
|
T110 |
5 |
|
T111 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T55 |
39 |
|
T110 |
7 |
|
T111 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T55 |
36 |
|
T110 |
5 |
|
T111 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T55 |
37 |
|
T110 |
7 |
|
T111 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T55 |
36 |
|
T110 |
5 |
|
T111 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T55 |
22 |
|
T110 |
10 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T55 |
35 |
|
T110 |
6 |
|
T111 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T55 |
35 |
|
T110 |
5 |
|
T111 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T55 |
35 |
|
T110 |
6 |
|
T111 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T55 |
34 |
|
T110 |
5 |
|
T111 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T55 |
35 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T55 |
35 |
|
T110 |
6 |
|
T111 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T55 |
33 |
|
T110 |
6 |
|
T111 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T55 |
33 |
|
T110 |
5 |
|
T111 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T55 |
31 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T55 |
32 |
|
T110 |
5 |
|
T111 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T55 |
28 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T55 |
32 |
|
T110 |
4 |
|
T111 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T55 |
28 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T55 |
32 |
|
T110 |
3 |
|
T111 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T55 |
22 |
|
T110 |
9 |
|
T111 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T55 |
31 |
|
T110 |
3 |
|
T111 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T55 |
23 |
|
T110 |
11 |
|
T111 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T55 |
27 |
|
T110 |
5 |
|
T111 |
40 |