Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12774674	1			T23	1		T24	2058		T25	65878
all_values[1]	12774674	1			T23	1		T24	2058		T25	65878
all_values[2]	12774674	1			T23	1		T24	2058		T25	65878
all_values[3]	12774674	1			T23	1		T24	2058		T25	65878
all_values[4]	12774674	1			T23	1		T24	2058		T25	65878
all_values[5]	12774674	1			T23	1		T24	2058		T25	65878
all_values[6]	12774674	1			T23	1		T24	2058		T25	65878
all_values[7]	12774674	1			T23	1		T24	2058		T25	65878
all_values[8]	12774674	1			T23	1		T24	2058		T25	65878
all_values[9]	12774674	1			T23	1		T24	2058		T25	65878
all_values[10]	12774674	1			T23	1		T24	2058		T25	65878
all_values[11]	12774674	1			T23	1		T24	2058		T25	65878
all_values[12]	12774674	1			T23	1		T24	2058		T25	65878
all_values[13]	12774674	1			T23	1		T24	2058		T25	65878
all_values[14]	12774674	1			T23	1		T24	2058		T25	65878
all_values[15]	12774674	1			T23	1		T24	2058		T25	65878
all_values[16]	12774674	1			T23	1		T24	2058		T25	65878
all_values[17]	12774674	1			T23	1		T24	2058		T25	65878
all_values[18]	12774674	1			T23	1		T24	2058		T25	65878
all_values[19]	12774674	1			T23	1		T24	2058		T25	65878
all_values[20]	12774674	1			T23	1		T24	2058		T25	65878
all_values[21]	12774674	1			T23	1		T24	2058		T25	65878
all_values[22]	12774674	1			T23	1		T24	2058		T25	65878
all_values[23]	12774674	1			T23	1		T24	2058		T25	65878
all_values[24]	12774674	1			T23	1		T24	2058		T25	65878
all_values[25]	12774674	1			T23	1		T24	2058		T25	65878
all_values[26]	12774674	1			T23	1		T24	2058		T25	65878
all_values[27]	12774674	1			T23	1		T24	2058		T25	65878
all_values[28]	12774674	1			T23	1		T24	2058		T25	65878
all_values[29]	12774674	1			T23	1		T24	2058		T25	65878
all_values[30]	12774674	1			T23	1		T24	2058		T25	65878
all_values[31]	12774674	1			T23	1		T24	2058		T25	65878

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

238082693

1

T23

32

T24

33458

T25

117456

auto[1]

170706875

1

T24

32398

T25

933531

T28

31849

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

100022054

1

T23

32

T24

5708

T25

440276

auto[1]

308767514

1

T24

60148

T25

166782

T28

56125

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

404401839

1

T23

32

T24

65856

T25

208346

auto[1]

4387729

1

T25

24633

T28

2201

T33

196

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2608414	1			T23	1		T24	45		T25	11093
all_values[0]	auto[0]	auto[0]	auto[1]	4757295	1			T24	772		T25	25098		T28	1081
all_values[0]	auto[0]	auto[1]	auto[0]	513500	1			T24	93		T25	2818		T28	96
all_values[0]	auto[0]	auto[1]	auto[1]	4758306	1			T24	1148		T25	26094		T28	593
all_values[0]	auto[1]	auto[0]	auto[1]	69267	1			T25	393		T28	44		T33	7
all_values[0]	auto[1]	auto[1]	auto[1]	67892	1			T25	382		T28	26		T33	2
all_values[1]	auto[0]	auto[0]	auto[0]	2609397	1			T23	1		T24	70		T25	10826
all_values[1]	auto[0]	auto[0]	auto[1]	4771798	1			T24	865		T25	24752		T28	961
all_values[1]	auto[0]	auto[1]	auto[0]	509801	1			T24	129		T25	3000		T28	95
all_values[1]	auto[0]	auto[1]	auto[1]	4746558	1			T24	994		T25	26514		T28	649
all_values[1]	auto[1]	auto[0]	auto[1]	69201	1			T25	399		T28	56		T33	5
all_values[1]	auto[1]	auto[1]	auto[1]	67919	1			T25	387		T28	20		T33	1
all_values[2]	auto[0]	auto[0]	auto[0]	2609868	1			T23	1		T24	30		T25	10422
all_values[2]	auto[0]	auto[0]	auto[1]	4773849	1			T24	882		T25	25901		T28	815
all_values[2]	auto[0]	auto[1]	auto[0]	512737	1			T24	90		T25	2913		T28	105
all_values[2]	auto[0]	auto[1]	auto[1]	4741730	1			T24	1056		T25	25889		T28	876
all_values[2]	auto[1]	auto[0]	auto[1]	68467	1			T25	357		T28	35		T33	4
all_values[2]	auto[1]	auto[1]	auto[1]	68023	1			T25	396		T28	26		T33	3
all_values[3]	auto[0]	auto[0]	auto[0]	2602943	1			T23	1		T24	133		T25	10789
all_values[3]	auto[0]	auto[0]	auto[1]	4766326	1			T24	983		T25	25866		T28	929
all_values[3]	auto[0]	auto[1]	auto[0]	508729	1			T24	88		T25	2885		T28	62
all_values[3]	auto[0]	auto[1]	auto[1]	4759565	1			T24	854		T25	25579		T28	812
all_values[3]	auto[1]	auto[0]	auto[1]	69129	1			T25	377		T28	46		T33	5
all_values[3]	auto[1]	auto[1]	auto[1]	67982	1			T25	382		T28	31		T34	2
all_values[4]	auto[0]	auto[0]	auto[0]	2612216	1			T23	1		T24	80		T25	10729
all_values[4]	auto[0]	auto[0]	auto[1]	4739142	1			T24	1050		T25	25053		T28	884
all_values[4]	auto[0]	auto[1]	auto[0]	519151	1			T24	102		T25	2967		T28	88
all_values[4]	auto[0]	auto[1]	auto[1]	4766812	1			T24	826		T25	26382		T28	808
all_values[4]	auto[1]	auto[0]	auto[1]	68629	1			T25	334		T28	43		T33	6
all_values[4]	auto[1]	auto[1]	auto[1]	68724	1			T25	413		T28	36		T1	515
all_values[5]	auto[0]	auto[0]	auto[0]	2607293	1			T23	1		T24	100		T25	10702
all_values[5]	auto[0]	auto[0]	auto[1]	4737985	1			T24	926		T25	25286		T28	736
all_values[5]	auto[0]	auto[1]	auto[0]	514985	1			T24	46		T25	3021		T28	150
all_values[5]	auto[0]	auto[1]	auto[1]	4777261	1			T24	986		T25	26091		T28	912
all_values[5]	auto[1]	auto[0]	auto[1]	68756	1			T25	400		T28	23		T33	2
all_values[5]	auto[1]	auto[1]	auto[1]	68394	1			T25	378		T28	42		T33	3
all_values[6]	auto[0]	auto[0]	auto[0]	2614539	1			T23	1		T24	52		T25	11146
all_values[6]	auto[0]	auto[0]	auto[1]	4754678	1			T24	992		T25	25029		T28	698
all_values[6]	auto[0]	auto[1]	auto[0]	512382	1			T24	87		T25	3236		T28	158
all_values[6]	auto[0]	auto[1]	auto[1]	4756079	1			T24	927		T25	25701		T28	952
all_values[6]	auto[1]	auto[0]	auto[1]	68534	1			T25	375		T28	26		T33	8
all_values[6]	auto[1]	auto[1]	auto[1]	68462	1			T25	391		T28	42		T33	2
all_values[7]	auto[0]	auto[0]	auto[0]	2613205	1			T23	1		T24	55		T25	10667
all_values[7]	auto[0]	auto[0]	auto[1]	4777341	1			T24	791		T25	25470		T28	845
all_values[7]	auto[0]	auto[1]	auto[0]	528161	1			T24	85		T25	3011		T28	104
all_values[7]	auto[0]	auto[1]	auto[1]	4718514	1			T24	1127		T25	25972		T28	811
all_values[7]	auto[1]	auto[0]	auto[1]	68793	1			T25	368		T28	28		T33	3
all_values[7]	auto[1]	auto[1]	auto[1]	68660	1			T25	390		T28	42		T33	3
all_values[8]	auto[0]	auto[0]	auto[0]	2616699	1			T23	1		T24	132		T25	10909
all_values[8]	auto[0]	auto[0]	auto[1]	4760384	1			T24	975		T25	24858		T28	768
all_values[8]	auto[0]	auto[1]	auto[0]	513331	1			T24	72		T25	3059		T28	118
all_values[8]	auto[0]	auto[1]	auto[1]	4746610	1			T24	879		T25	26255		T28	881
all_values[8]	auto[1]	auto[0]	auto[1]	69273	1			T25	409		T28	32		T33	1
all_values[8]	auto[1]	auto[1]	auto[1]	68377	1			T25	388		T28	35		T33	4
all_values[9]	auto[0]	auto[0]	auto[0]	2621660	1			T23	1		T24	95		T25	11158
all_values[9]	auto[0]	auto[0]	auto[1]	4761429	1			T24	1277		T25	24887		T28	766
all_values[9]	auto[0]	auto[1]	auto[0]	524639	1			T24	33		T25	3021		T28	88
all_values[9]	auto[0]	auto[1]	auto[1]	4729789	1			T24	653		T25	26029		T28	921
all_values[9]	auto[1]	auto[0]	auto[1]	68956	1			T25	380		T28	32		T33	5
all_values[9]	auto[1]	auto[1]	auto[1]	68201	1			T25	403		T28	32		T34	2
all_values[10]	auto[0]	auto[0]	auto[0]	2610490	1			T23	1		T24	104		T25	10740
all_values[10]	auto[0]	auto[0]	auto[1]	4767949	1			T24	742		T25	24997		T28	716
all_values[10]	auto[0]	auto[1]	auto[0]	508704	1			T24	176		T25	2747		T28	114
all_values[10]	auto[0]	auto[1]	auto[1]	4750812	1			T24	1036		T25	26639		T28	993
all_values[10]	auto[1]	auto[0]	auto[1]	68266	1			T25	390		T28	21		T33	3
all_values[10]	auto[1]	auto[1]	auto[1]	68453	1			T25	365		T28	53		T33	2
all_values[11]	auto[0]	auto[0]	auto[0]	2612269	1			T23	1		T24	130		T25	10770
all_values[11]	auto[0]	auto[0]	auto[1]	4753389	1			T24	1444		T25	25172		T28	725
all_values[11]	auto[0]	auto[1]	auto[0]	515710	1			T24	29		T25	3306		T28	109
all_values[11]	auto[0]	auto[1]	auto[1]	4756481	1			T24	455		T25	25879		T28	961
all_values[11]	auto[1]	auto[0]	auto[1]	68456	1			T25	366		T28	24		T33	3
all_values[11]	auto[1]	auto[1]	auto[1]	68369	1			T25	385		T28	49		T33	4
all_values[12]	auto[0]	auto[0]	auto[0]	2611710	1			T23	1		T24	87		T25	10939
all_values[12]	auto[0]	auto[0]	auto[1]	4758305	1			T24	779		T25	25346		T28	845
all_values[12]	auto[0]	auto[1]	auto[0]	518068	1			T24	90		T25	2897		T28	116
all_values[12]	auto[0]	auto[1]	auto[1]	4748716	1			T24	1102		T25	25949		T28	860
all_values[12]	auto[1]	auto[0]	auto[1]	69245	1			T25	376		T28	32		T33	8
all_values[12]	auto[1]	auto[1]	auto[1]	68630	1			T25	371		T28	43		T33	1
all_values[13]	auto[0]	auto[0]	auto[0]	2611787	1			T23	1		T24	101		T25	11150
all_values[13]	auto[0]	auto[0]	auto[1]	4778071	1			T24	886		T25	26586		T28	713
all_values[13]	auto[0]	auto[1]	auto[0]	502551	1			T24	87		T25	2735		T28	82
all_values[13]	auto[0]	auto[1]	auto[1]	4745081	1			T24	984		T25	24616		T28	897
all_values[13]	auto[1]	auto[0]	auto[1]	68595	1			T25	405		T28	33		T33	4
all_values[13]	auto[1]	auto[1]	auto[1]	68589	1			T25	386		T28	43		T33	1
all_values[14]	auto[0]	auto[0]	auto[0]	2610708	1			T23	1		T24	105		T25	10708
all_values[14]	auto[0]	auto[0]	auto[1]	4752562	1			T24	846		T25	25839		T28	879
all_values[14]	auto[0]	auto[1]	auto[0]	509899	1			T24	63		T25	2745		T28	101
all_values[14]	auto[0]	auto[1]	auto[1]	4764246	1			T24	1044		T25	25804		T28	796
all_values[14]	auto[1]	auto[0]	auto[1]	68840	1			T25	408		T28	35		T33	3
all_values[14]	auto[1]	auto[1]	auto[1]	68419	1			T25	374		T28	37		T33	3
all_values[15]	auto[0]	auto[0]	auto[0]	2617410	1			T23	1		T24	52		T25	10896
all_values[15]	auto[0]	auto[0]	auto[1]	4759426	1			T24	1246		T25	26453		T28	952
all_values[15]	auto[0]	auto[1]	auto[0]	511885	1			T24	77		T25	2828		T28	73
all_values[15]	auto[0]	auto[1]	auto[1]	4749027	1			T24	683		T25	24925		T28	762
all_values[15]	auto[1]	auto[0]	auto[1]	68772	1			T25	380		T28	38		T33	4
all_values[15]	auto[1]	auto[1]	auto[1]	68154	1			T25	396		T28	20		T1	531
all_values[16]	auto[0]	auto[0]	auto[0]	2602793	1			T23	1		T24	53		T25	10557
all_values[16]	auto[0]	auto[0]	auto[1]	4790933	1			T24	810		T25	25346		T28	719
all_values[16]	auto[0]	auto[1]	auto[0]	516802	1			T24	73		T25	2995		T28	51
all_values[16]	auto[0]	auto[1]	auto[1]	4727033	1			T24	1122		T25	26229		T28	1015
all_values[16]	auto[1]	auto[0]	auto[1]	68931	1			T25	328		T28	22		T33	1
all_values[16]	auto[1]	auto[1]	auto[1]	68182	1			T25	423		T28	49		T33	3
all_values[17]	auto[0]	auto[0]	auto[0]	2616073	1			T23	1		T24	99		T25	10800
all_values[17]	auto[0]	auto[0]	auto[1]	4749157	1			T24	840		T25	26128		T28	776
all_values[17]	auto[0]	auto[1]	auto[0]	520454	1			T24	129		T25	2875		T28	123
all_values[17]	auto[0]	auto[1]	auto[1]	4751751	1			T24	990		T25	25340		T28	893
all_values[17]	auto[1]	auto[0]	auto[1]	68801	1			T25	379		T28	30		T33	2
all_values[17]	auto[1]	auto[1]	auto[1]	68438	1			T25	356		T28	38		T33	4
all_values[18]	auto[0]	auto[0]	auto[0]	2604857	1			T23	1		T24	62		T25	10985
all_values[18]	auto[0]	auto[0]	auto[1]	4773894	1			T24	901		T25	26455		T28	793
all_values[18]	auto[0]	auto[1]	auto[0]	514208	1			T24	79		T25	2983		T28	107
all_values[18]	auto[0]	auto[1]	auto[1]	4744634	1			T24	1016		T25	24681		T28	880
all_values[18]	auto[1]	auto[0]	auto[1]	68927	1			T25	422		T28	28		T33	3
all_values[18]	auto[1]	auto[1]	auto[1]	68154	1			T25	352		T28	34		T33	1
all_values[19]	auto[0]	auto[0]	auto[0]	2611192	1			T23	1		T24	176		T25	10854
all_values[19]	auto[0]	auto[0]	auto[1]	4766980	1			T24	974		T25	25312		T28	986
all_values[19]	auto[0]	auto[1]	auto[0]	518244	1			T24	91		T25	2929		T28	103
all_values[19]	auto[0]	auto[1]	auto[1]	4741259	1			T24	817		T25	26013		T28	722
all_values[19]	auto[1]	auto[0]	auto[1]	68943	1			T25	380		T28	35		T33	3
all_values[19]	auto[1]	auto[1]	auto[1]	68056	1			T25	390		T28	36		T33	4
all_values[20]	auto[0]	auto[0]	auto[0]	2609760	1			T23	1		T24	90		T25	10830
all_values[20]	auto[0]	auto[0]	auto[1]	4749721	1			T24	905		T25	25573		T28	899
all_values[20]	auto[0]	auto[1]	auto[0]	524522	1			T24	77		T25	3049		T28	139
all_values[20]	auto[0]	auto[1]	auto[1]	4753797	1			T24	986		T25	25638		T28	830
all_values[20]	auto[1]	auto[0]	auto[1]	68814	1			T25	394		T28	31		T33	4
all_values[20]	auto[1]	auto[1]	auto[1]	68060	1			T25	394		T28	30		T33	2
all_values[21]	auto[0]	auto[0]	auto[0]	2613897	1			T23	1		T24	111		T25	10706
all_values[21]	auto[0]	auto[0]	auto[1]	4781153	1			T24	1152		T25	25573		T28	802
all_values[21]	auto[0]	auto[1]	auto[0]	510625	1			T24	84		T25	2873		T28	99
all_values[21]	auto[0]	auto[1]	auto[1]	4731629	1			T24	711		T25	25971		T28	898
all_values[21]	auto[1]	auto[0]	auto[1]	69031	1			T25	377		T28	27		T33	3
all_values[21]	auto[1]	auto[1]	auto[1]	68339	1			T25	378		T28	44		T33	3
all_values[22]	auto[0]	auto[0]	auto[0]	2611232	1			T23	1		T24	52		T25	10561
all_values[22]	auto[0]	auto[0]	auto[1]	4760516	1			T24	998		T25	24999		T28	878
all_values[22]	auto[0]	auto[1]	auto[0]	514840	1			T24	129		T25	3193		T28	53
all_values[22]	auto[0]	auto[1]	auto[1]	4751040	1			T24	879		T25	26351		T28	830
all_values[22]	auto[1]	auto[0]	auto[1]	68639	1			T25	393		T28	33		T33	5
all_values[22]	auto[1]	auto[1]	auto[1]	68407	1			T25	381		T28	39		T33	2
all_values[23]	auto[0]	auto[0]	auto[0]	2608014	1			T23	1		T24	76		T25	10536
all_values[23]	auto[0]	auto[0]	auto[1]	4750901	1			T24	735		T25	25928		T28	775
all_values[23]	auto[0]	auto[1]	auto[0]	522899	1			T24	104		T25	2823		T28	149
all_values[23]	auto[0]	auto[1]	auto[1]	4755770	1			T24	1143		T25	25802		T28	886
all_values[23]	auto[1]	auto[0]	auto[1]	69008	1			T25	419		T28	28		T33	2
all_values[23]	auto[1]	auto[1]	auto[1]	68082	1			T25	370		T28	38		T33	2
all_values[24]	auto[0]	auto[0]	auto[0]	2612311	1			T23	1		T24	88		T25	11084
all_values[24]	auto[0]	auto[0]	auto[1]	4760596	1			T24	1132		T25	26273		T28	855
all_values[24]	auto[0]	auto[1]	auto[0]	509130	1			T24	87		T25	2794		T28	140
all_values[24]	auto[0]	auto[1]	auto[1]	4755827	1			T24	751		T25	24943		T28	801
all_values[24]	auto[1]	auto[0]	auto[1]	68548	1			T25	393		T28	34		T33	2
all_values[24]	auto[1]	auto[1]	auto[1]	68262	1			T25	391		T28	27		T33	3
all_values[25]	auto[0]	auto[0]	auto[0]	2604638	1			T23	1		T24	92		T25	10748
all_values[25]	auto[0]	auto[0]	auto[1]	4763689	1			T24	800		T25	26280		T28	775
all_values[25]	auto[0]	auto[1]	auto[0]	522225	1			T24	94		T25	2810		T28	132
all_values[25]	auto[0]	auto[1]	auto[1]	4747282	1			T24	1072		T25	25278		T28	905
all_values[25]	auto[1]	auto[0]	auto[1]	68715	1			T25	395		T28	31		T33	3
all_values[25]	auto[1]	auto[1]	auto[1]	68125	1			T25	367		T28	37		T33	2
all_values[26]	auto[0]	auto[0]	auto[0]	2598170	1			T23	1		T24	144		T25	10521
all_values[26]	auto[0]	auto[0]	auto[1]	4756300	1			T24	801		T25	25614		T28	857
all_values[26]	auto[0]	auto[1]	auto[0]	511297	1			T24	56		T25	2912		T28	77
all_values[26]	auto[0]	auto[1]	auto[1]	4771314	1			T24	1057		T25	26056		T28	905
all_values[26]	auto[1]	auto[0]	auto[1]	68903	1			T25	369		T28	33		T33	5
all_values[26]	auto[1]	auto[1]	auto[1]	68690	1			T25	406		T28	35		T34	4
all_values[27]	auto[0]	auto[0]	auto[0]	2613419	1			T23	1		T24	134		T25	10730
all_values[27]	auto[0]	auto[0]	auto[1]	4765373	1			T24	1071		T25	24463		T28	902
all_values[27]	auto[0]	auto[1]	auto[0]	509294	1			T24	62		T25	3208		T28	101
all_values[27]	auto[0]	auto[1]	auto[1]	4749642	1			T24	791		T25	26710		T28	822
all_values[27]	auto[1]	auto[0]	auto[1]	68502	1			T25	396		T28	43		T33	3
all_values[27]	auto[1]	auto[1]	auto[1]	68444	1			T25	371		T28	22		T33	2
all_values[28]	auto[0]	auto[0]	auto[0]	2613601	1			T23	1		T24	97		T25	10647
all_values[28]	auto[0]	auto[0]	auto[1]	4729967	1			T24	924		T25	25387		T28	685
all_values[28]	auto[0]	auto[1]	auto[0]	516838	1			T24	94		T25	3024		T28	118
all_values[28]	auto[0]	auto[1]	auto[1]	4777614	1			T24	943		T25	26041		T28	948
all_values[28]	auto[1]	auto[0]	auto[1]	68606	1			T25	386		T28	30		T33	5
all_values[28]	auto[1]	auto[1]	auto[1]	68048	1			T25	393		T28	36		T33	4
all_values[29]	auto[0]	auto[0]	auto[0]	2608716	1			T23	1		T24	75		T25	10758
all_values[29]	auto[0]	auto[0]	auto[1]	4764583	1			T24	925		T25	25570		T28	786
all_values[29]	auto[0]	auto[1]	auto[0]	516875	1			T24	139		T25	3068		T28	137
all_values[29]	auto[0]	auto[1]	auto[1]	4747156	1			T24	919		T25	25698		T28	903
all_values[29]	auto[1]	auto[0]	auto[1]	69170	1			T25	411		T28	34		T33	6
all_values[29]	auto[1]	auto[1]	auto[1]	68174	1			T25	373		T28	36		T33	4
all_values[30]	auto[0]	auto[0]	auto[0]	2605732	1			T23	1		T24	79		T25	10864
all_values[30]	auto[0]	auto[0]	auto[1]	4751078	1			T24	1174		T25	25001		T28	832
all_values[30]	auto[0]	auto[1]	auto[0]	526257	1			T24	76		T25	3198		T28	77
all_values[30]	auto[0]	auto[1]	auto[1]	4754339	1			T24	729		T25	26019		T28	839
all_values[30]	auto[1]	auto[0]	auto[1]	68775	1			T25	423		T28	39		T33	4
all_values[30]	auto[1]	auto[1]	auto[1]	68493	1			T25	373		T28	35		T33	3
all_values[31]	auto[0]	auto[0]	auto[0]	2607930	1			T23	1		T24	124		T25	10647
all_values[31]	auto[0]	auto[0]	auto[1]	4763189	1			T24	937		T25	26243		T28	928
all_values[31]	auto[0]	auto[1]	auto[0]	510368	1			T24	64		T25	2881		T28	83
all_values[31]	auto[0]	auto[1]	auto[1]	4756152	1			T24	933		T25	25361		T28	802
all_values[31]	auto[1]	auto[0]	auto[1]	68299	1			T25	373		T28	37		T33	5
all_values[31]	auto[1]	auto[1]	auto[1]	68736	1			T25	373		T28	25		T33	1

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal