Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7452184 |
1 |
|
|
T23 |
1 |
|
T24 |
912 |
|
T25 |
36680 |
| auto[1] |
5322490 |
1 |
|
|
T24 |
1146 |
|
T25 |
29198 |
|
T28 |
1007 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10578134 |
1 |
|
|
T23 |
1 |
|
T24 |
1445 |
|
T25 |
54282 |
| auto[1] |
2196540 |
1 |
|
|
T24 |
613 |
|
T25 |
11596 |
|
T28 |
774 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7437813 |
1 |
|
|
T23 |
1 |
|
T24 |
839 |
|
T25 |
37869 |
| auto[1] |
5336861 |
1 |
|
|
T24 |
1219 |
|
T25 |
28009 |
|
T28 |
966 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1571552 |
1 |
|
|
T24 |
323 |
|
T25 |
7968 |
|
T28 |
92 |
| auto[1] |
auto[0] |
auto[1] |
1100925 |
1 |
|
|
T24 |
331 |
|
T25 |
5966 |
|
T28 |
393 |
| auto[1] |
auto[1] |
auto[0] |
1568769 |
1 |
|
|
T24 |
283 |
|
T25 |
8445 |
|
T28 |
100 |
| auto[1] |
auto[1] |
auto[1] |
1095615 |
1 |
|
|
T24 |
282 |
|
T25 |
5630 |
|
T28 |
381 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |