Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7438398 |
1 |
|
|
T23 |
1 |
|
T24 |
1116 |
|
T25 |
37032 |
| auto[1] |
5336276 |
1 |
|
|
T24 |
942 |
|
T25 |
28846 |
|
T28 |
905 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12087356 |
1 |
|
|
T23 |
1 |
|
T24 |
1929 |
|
T25 |
62088 |
| auto[1] |
687318 |
1 |
|
|
T24 |
129 |
|
T25 |
3790 |
|
T28 |
39 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7433941 |
1 |
|
|
T23 |
1 |
|
T24 |
1311 |
|
T25 |
36649 |
| auto[1] |
5340733 |
1 |
|
|
T24 |
747 |
|
T25 |
29229 |
|
T28 |
1002 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2326832 |
1 |
|
|
T24 |
274 |
|
T25 |
12999 |
|
T28 |
534 |
| auto[1] |
auto[0] |
auto[1] |
342510 |
1 |
|
|
T24 |
57 |
|
T25 |
1943 |
|
T28 |
19 |
| auto[1] |
auto[1] |
auto[0] |
2326583 |
1 |
|
|
T24 |
344 |
|
T25 |
12440 |
|
T28 |
429 |
| auto[1] |
auto[1] |
auto[1] |
344808 |
1 |
|
|
T24 |
72 |
|
T25 |
1847 |
|
T28 |
20 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |