cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48808 |
1 |
|
|
T21 |
977 |
|
T59 |
1864 |
|
T62 |
377 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45406 |
1 |
|
|
T21 |
438 |
|
T59 |
146 |
|
T62 |
1074 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55475 |
1 |
|
|
T21 |
2136 |
|
T59 |
516 |
|
T62 |
231 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37845 |
1 |
|
|
T21 |
528 |
|
T59 |
125 |
|
T62 |
162 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T21 |
14 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T21 |
12 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T21 |
12 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1095 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T21 |
12 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1067 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1056 |
1 |
|
|
T21 |
12 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1046 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1035 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1016 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1007 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47215 |
1 |
|
|
T21 |
1094 |
|
T59 |
390 |
|
T62 |
1057 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44424 |
1 |
|
|
T21 |
393 |
|
T59 |
1084 |
|
T62 |
167 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49943 |
1 |
|
|
T21 |
1934 |
|
T59 |
626 |
|
T62 |
467 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43809 |
1 |
|
|
T21 |
516 |
|
T59 |
373 |
|
T62 |
189 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T21 |
20 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T21 |
20 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T21 |
15 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1113 |
1 |
|
|
T21 |
14 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
18 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53087 |
1 |
|
|
T21 |
597 |
|
T59 |
1484 |
|
T62 |
1088 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42550 |
1 |
|
|
T21 |
1553 |
|
T59 |
318 |
|
T62 |
96 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47444 |
1 |
|
|
T21 |
925 |
|
T59 |
404 |
|
T62 |
433 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43987 |
1 |
|
|
T21 |
723 |
|
T59 |
225 |
|
T62 |
217 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T21 |
31 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T21 |
31 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T21 |
28 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T21 |
30 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T21 |
28 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
590 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
590 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T21 |
22 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
587 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
587 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1079 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1071 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1051 |
1 |
|
|
T21 |
25 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1050 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57342 |
1 |
|
|
T21 |
1710 |
|
T59 |
624 |
|
T62 |
212 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38098 |
1 |
|
|
T21 |
684 |
|
T59 |
200 |
|
T62 |
322 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49687 |
1 |
|
|
T21 |
920 |
|
T59 |
1397 |
|
T62 |
971 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42186 |
1 |
|
|
T21 |
522 |
|
T59 |
327 |
|
T62 |
214 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T21 |
24 |
|
T59 |
13 |
|
T62 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T21 |
23 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T21 |
22 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T21 |
21 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T21 |
21 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T21 |
23 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T21 |
21 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T21 |
23 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T21 |
20 |
|
T59 |
14 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T21 |
23 |
|
T59 |
8 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T21 |
18 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T21 |
22 |
|
T59 |
7 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1084 |
1 |
|
|
T21 |
18 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T21 |
21 |
|
T59 |
6 |
|
T62 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1052 |
1 |
|
|
T21 |
15 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T21 |
21 |
|
T59 |
6 |
|
T62 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1028 |
1 |
|
|
T21 |
15 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1073 |
1 |
|
|
T21 |
20 |
|
T59 |
6 |
|
T62 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1001 |
1 |
|
|
T21 |
15 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48818 |
1 |
|
|
T21 |
1377 |
|
T59 |
460 |
|
T62 |
204 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45313 |
1 |
|
|
T21 |
1008 |
|
T59 |
206 |
|
T62 |
217 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49747 |
1 |
|
|
T21 |
579 |
|
T59 |
1584 |
|
T62 |
248 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42616 |
1 |
|
|
T21 |
727 |
|
T59 |
276 |
|
T62 |
1035 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T21 |
44 |
|
T59 |
10 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T21 |
40 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T21 |
43 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T21 |
40 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T21 |
43 |
|
T59 |
9 |
|
T62 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T21 |
39 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T21 |
40 |
|
T59 |
9 |
|
T62 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T21 |
36 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T21 |
40 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T21 |
40 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T21 |
39 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T21 |
39 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
8 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T21 |
33 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T21 |
38 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T21 |
33 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T21 |
38 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T21 |
32 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T21 |
35 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T21 |
29 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T21 |
28 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1109 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T21 |
28 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1062 |
1 |
|
|
T21 |
33 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1063 |
1 |
|
|
T21 |
28 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
4 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1032 |
1 |
|
|
T21 |
31 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1026 |
1 |
|
|
T21 |
27 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49544 |
1 |
|
|
T21 |
1647 |
|
T59 |
501 |
|
T62 |
388 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42243 |
1 |
|
|
T21 |
740 |
|
T59 |
239 |
|
T62 |
177 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50365 |
1 |
|
|
T21 |
528 |
|
T59 |
1588 |
|
T62 |
1165 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44909 |
1 |
|
|
T21 |
758 |
|
T59 |
184 |
|
T62 |
88 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T21 |
35 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T21 |
38 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T21 |
33 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T21 |
37 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T21 |
37 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T21 |
37 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T21 |
29 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T21 |
37 |
|
T59 |
12 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T21 |
37 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T21 |
25 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T21 |
33 |
|
T59 |
11 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T21 |
24 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T21 |
30 |
|
T59 |
11 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T21 |
22 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T21 |
22 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1124 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T21 |
22 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1092 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T21 |
22 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1069 |
1 |
|
|
T21 |
28 |
|
T59 |
10 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T21 |
22 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1043 |
1 |
|
|
T21 |
28 |
|
T59 |
10 |
|
T62 |
3 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T21 |
14 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1055 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1012 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
2 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49352 |
1 |
|
|
T21 |
684 |
|
T59 |
1666 |
|
T62 |
914 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37907 |
1 |
|
|
T21 |
1575 |
|
T59 |
202 |
|
T62 |
401 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57060 |
1 |
|
|
T21 |
879 |
|
T59 |
443 |
|
T62 |
299 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42538 |
1 |
|
|
T21 |
556 |
|
T59 |
220 |
|
T62 |
188 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T21 |
30 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T21 |
32 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T21 |
30 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T21 |
31 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T21 |
29 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T21 |
31 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T21 |
30 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T21 |
30 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T21 |
29 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T21 |
27 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T21 |
27 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T21 |
27 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T21 |
27 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T21 |
27 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T21 |
26 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T21 |
26 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T21 |
26 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
589 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T21 |
25 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T21 |
25 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
587 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T21 |
24 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T21 |
23 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
587 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1086 |
1 |
|
|
T21 |
24 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1080 |
1 |
|
|
T21 |
23 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
587 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1063 |
1 |
|
|
T21 |
24 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1052 |
1 |
|
|
T21 |
23 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52645 |
1 |
|
|
T21 |
1720 |
|
T59 |
412 |
|
T62 |
383 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38648 |
1 |
|
|
T21 |
685 |
|
T59 |
170 |
|
T62 |
197 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58460 |
1 |
|
|
T21 |
556 |
|
T59 |
1370 |
|
T62 |
344 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
36837 |
1 |
|
|
T21 |
786 |
|
T59 |
510 |
|
T62 |
869 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T21 |
31 |
|
T59 |
15 |
|
T62 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T21 |
32 |
|
T59 |
18 |
|
T62 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T21 |
31 |
|
T59 |
15 |
|
T62 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T21 |
31 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T21 |
31 |
|
T59 |
14 |
|
T62 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T21 |
31 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T21 |
29 |
|
T59 |
14 |
|
T62 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T21 |
31 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T21 |
11 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T21 |
29 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1092 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T21 |
29 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1060 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T21 |
29 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1030 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1047 |
1 |
|
|
T21 |
29 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52523 |
1 |
|
|
T21 |
1141 |
|
T59 |
560 |
|
T62 |
879 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40003 |
1 |
|
|
T21 |
280 |
|
T59 |
277 |
|
T62 |
262 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50257 |
1 |
|
|
T21 |
1024 |
|
T59 |
1412 |
|
T62 |
359 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44065 |
1 |
|
|
T21 |
1476 |
|
T59 |
277 |
|
T62 |
194 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T21 |
19 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T21 |
19 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T21 |
18 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T21 |
21 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T21 |
16 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T21 |
15 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T21 |
14 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T21 |
12 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T21 |
12 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T21 |
12 |
|
T59 |
9 |
|
T62 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T21 |
19 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T21 |
18 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1085 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T21 |
18 |
|
T59 |
8 |
|
T62 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1057 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T21 |
18 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1028 |
1 |
|
|
T21 |
10 |
|
T59 |
8 |
|
T62 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T21 |
18 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55864 |
1 |
|
|
T21 |
992 |
|
T59 |
261 |
|
T62 |
1088 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37333 |
1 |
|
|
T21 |
412 |
|
T59 |
1191 |
|
T62 |
81 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51894 |
1 |
|
|
T21 |
1979 |
|
T59 |
636 |
|
T62 |
371 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41286 |
1 |
|
|
T21 |
550 |
|
T59 |
377 |
|
T62 |
220 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T21 |
18 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T21 |
18 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T21 |
17 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T21 |
17 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T21 |
18 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T21 |
17 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T21 |
17 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T21 |
17 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1062 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T21 |
17 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1032 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
7 |
|
T62 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1092 |
1 |
|
|
T21 |
17 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51097 |
1 |
|
|
T21 |
702 |
|
T59 |
501 |
|
T62 |
202 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
34950 |
1 |
|
|
T21 |
500 |
|
T59 |
470 |
|
T62 |
167 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55422 |
1 |
|
|
T21 |
1817 |
|
T59 |
303 |
|
T62 |
1272 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44884 |
1 |
|
|
T21 |
789 |
|
T59 |
1110 |
|
T62 |
188 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T21 |
30 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T21 |
30 |
|
T59 |
20 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T21 |
28 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T21 |
30 |
|
T59 |
19 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T21 |
28 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T21 |
30 |
|
T59 |
19 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T21 |
26 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T21 |
30 |
|
T59 |
19 |
|
T62 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T21 |
26 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T21 |
26 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T21 |
26 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T21 |
25 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T21 |
28 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T21 |
23 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T21 |
21 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
588 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
588 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
5 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
587 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
587 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T21 |
26 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1052 |
1 |
|
|
T21 |
17 |
|
T59 |
16 |
|
T62 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
587 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1096 |
1 |
|
|
T21 |
25 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
46860 |
1 |
|
|
T21 |
703 |
|
T59 |
476 |
|
T62 |
253 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42427 |
1 |
|
|
T21 |
641 |
|
T59 |
278 |
|
T62 |
164 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49432 |
1 |
|
|
T21 |
768 |
|
T59 |
523 |
|
T62 |
1161 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46717 |
1 |
|
|
T21 |
1659 |
|
T59 |
1214 |
|
T62 |
174 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T21 |
34 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T21 |
32 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T21 |
30 |
|
T59 |
13 |
|
T62 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T21 |
29 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T21 |
27 |
|
T59 |
16 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T21 |
26 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T21 |
26 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T21 |
24 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T21 |
28 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1060 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1033 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48234 |
1 |
|
|
T21 |
665 |
|
T59 |
655 |
|
T62 |
342 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44228 |
1 |
|
|
T21 |
1409 |
|
T59 |
363 |
|
T62 |
997 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51076 |
1 |
|
|
T21 |
1190 |
|
T59 |
1363 |
|
T62 |
178 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42453 |
1 |
|
|
T21 |
693 |
|
T59 |
124 |
|
T62 |
276 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T21 |
23 |
|
T59 |
13 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T21 |
22 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T21 |
23 |
|
T59 |
13 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T21 |
22 |
|
T59 |
13 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T21 |
21 |
|
T59 |
13 |
|
T62 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T21 |
20 |
|
T59 |
13 |
|
T62 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T21 |
17 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T21 |
21 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T21 |
21 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T21 |
15 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T21 |
21 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T21 |
15 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T21 |
20 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T21 |
14 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T21 |
18 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T21 |
14 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T21 |
18 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T21 |
13 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T21 |
18 |
|
T59 |
4 |
|
T62 |
8 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47975 |
1 |
|
|
T21 |
1698 |
|
T59 |
1310 |
|
T62 |
216 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39087 |
1 |
|
|
T21 |
782 |
|
T59 |
301 |
|
T62 |
297 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53850 |
1 |
|
|
T21 |
539 |
|
T59 |
275 |
|
T62 |
219 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44196 |
1 |
|
|
T21 |
655 |
|
T59 |
450 |
|
T62 |
899 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T21 |
32 |
|
T59 |
19 |
|
T62 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T21 |
33 |
|
T59 |
21 |
|
T62 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T21 |
32 |
|
T59 |
19 |
|
T62 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T21 |
33 |
|
T59 |
21 |
|
T62 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T21 |
32 |
|
T59 |
18 |
|
T62 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T21 |
31 |
|
T59 |
21 |
|
T62 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T21 |
31 |
|
T59 |
18 |
|
T62 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T21 |
30 |
|
T59 |
20 |
|
T62 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T21 |
31 |
|
T59 |
18 |
|
T62 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T21 |
30 |
|
T59 |
20 |
|
T62 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T21 |
29 |
|
T59 |
20 |
|
T62 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T21 |
29 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T21 |
27 |
|
T59 |
20 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T21 |
28 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
14 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T21 |
27 |
|
T59 |
19 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T21 |
28 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T21 |
27 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T21 |
25 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T21 |
22 |
|
T59 |
17 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T21 |
22 |
|
T59 |
17 |
|
T62 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T21 |
22 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53148 |
1 |
|
|
T21 |
1796 |
|
T59 |
1556 |
|
T62 |
385 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37370 |
1 |
|
|
T21 |
899 |
|
T59 |
211 |
|
T62 |
220 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51169 |
1 |
|
|
T21 |
230 |
|
T59 |
400 |
|
T62 |
1047 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44780 |
1 |
|
|
T21 |
844 |
|
T59 |
230 |
|
T62 |
107 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T21 |
34 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T21 |
38 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T21 |
34 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T21 |
38 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T21 |
34 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T21 |
38 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T21 |
34 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T21 |
38 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T21 |
33 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T21 |
37 |
|
T59 |
17 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T21 |
36 |
|
T59 |
17 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T21 |
35 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
5 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T21 |
34 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T21 |
29 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
4 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T21 |
32 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T21 |
29 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
4 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T21 |
28 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
4 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T21 |
28 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
4 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T21 |
28 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1077 |
1 |
|
|
T21 |
28 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
4 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1050 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
4 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1074 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
9 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1026 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
4 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1042 |
1 |
|
|
T21 |
27 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50900 |
1 |
|
|
T21 |
1598 |
|
T59 |
310 |
|
T62 |
1054 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38464 |
1 |
|
|
T21 |
940 |
|
T59 |
1351 |
|
T62 |
364 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49011 |
1 |
|
|
T21 |
486 |
|
T59 |
451 |
|
T62 |
191 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47585 |
1 |
|
|
T21 |
629 |
|
T59 |
331 |
|
T62 |
175 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T21 |
43 |
|
T59 |
18 |
|
T62 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T21 |
41 |
|
T59 |
13 |
|
T62 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T21 |
43 |
|
T59 |
18 |
|
T62 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T21 |
40 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T21 |
43 |
|
T59 |
18 |
|
T62 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T21 |
38 |
|
T59 |
11 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T21 |
42 |
|
T59 |
18 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T21 |
37 |
|
T59 |
10 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T21 |
42 |
|
T59 |
18 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T21 |
36 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T21 |
42 |
|
T59 |
18 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
7 |
|
T59 |
9 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T21 |
33 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T21 |
41 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T21 |
40 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T21 |
40 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T21 |
31 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T21 |
40 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T21 |
31 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T21 |
39 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T21 |
31 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T21 |
39 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T21 |
30 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T21 |
37 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T21 |
28 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T21 |
36 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1079 |
1 |
|
|
T21 |
28 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
5 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1083 |
1 |
|
|
T21 |
36 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
7 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1048 |
1 |
|
|
T21 |
27 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50381 |
1 |
|
|
T21 |
698 |
|
T59 |
251 |
|
T62 |
336 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43403 |
1 |
|
|
T21 |
1518 |
|
T59 |
283 |
|
T62 |
192 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50749 |
1 |
|
|
T21 |
671 |
|
T59 |
603 |
|
T62 |
1095 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42188 |
1 |
|
|
T21 |
860 |
|
T59 |
1347 |
|
T62 |
241 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T21 |
34 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T21 |
33 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T21 |
33 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T21 |
31 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T21 |
29 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
12 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T21 |
22 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T21 |
31 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T21 |
22 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T21 |
20 |
|
T59 |
10 |
|
T62 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T21 |
30 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1061 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T21 |
27 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1024 |
1 |
|
|
T21 |
19 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T21 |
12 |
|
T59 |
4 |
|
T62 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1064 |
1 |
|
|
T21 |
27 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47453 |
1 |
|
|
T21 |
873 |
|
T59 |
374 |
|
T62 |
167 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43420 |
1 |
|
|
T21 |
1768 |
|
T59 |
446 |
|
T62 |
958 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53428 |
1 |
|
|
T21 |
528 |
|
T59 |
1301 |
|
T62 |
249 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41265 |
1 |
|
|
T21 |
528 |
|
T59 |
261 |
|
T62 |
296 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T21 |
35 |
|
T59 |
19 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T21 |
33 |
|
T59 |
17 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T21 |
33 |
|
T59 |
16 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T21 |
33 |
|
T59 |
15 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T21 |
33 |
|
T59 |
15 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T21 |
31 |
|
T59 |
15 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T21 |
30 |
|
T59 |
15 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T21 |
35 |
|
T59 |
18 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T21 |
30 |
|
T59 |
15 |
|
T62 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T21 |
34 |
|
T59 |
18 |
|
T62 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T21 |
29 |
|
T59 |
14 |
|
T62 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T21 |
32 |
|
T59 |
18 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T21 |
27 |
|
T59 |
13 |
|
T62 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T21 |
32 |
|
T59 |
18 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T21 |
26 |
|
T59 |
12 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T21 |
31 |
|
T59 |
17 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T21 |
31 |
|
T59 |
17 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T21 |
29 |
|
T59 |
17 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1092 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
12 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1070 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52046 |
1 |
|
|
T21 |
562 |
|
T59 |
426 |
|
T62 |
235 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40228 |
1 |
|
|
T21 |
1585 |
|
T59 |
1238 |
|
T62 |
68 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53941 |
1 |
|
|
T21 |
760 |
|
T59 |
532 |
|
T62 |
581 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40676 |
1 |
|
|
T21 |
829 |
|
T59 |
341 |
|
T62 |
892 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T21 |
31 |
|
T59 |
14 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T21 |
34 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T21 |
29 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T21 |
34 |
|
T59 |
10 |
|
T62 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T21 |
34 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T21 |
33 |
|
T59 |
10 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T21 |
33 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T21 |
32 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T21 |
24 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T21 |
31 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T21 |
23 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T21 |
28 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T21 |
28 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T21 |
13 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1035 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T21 |
9 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1037 |
1 |
|
|
T21 |
28 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
46057 |
1 |
|
|
T21 |
705 |
|
T59 |
1245 |
|
T62 |
458 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44519 |
1 |
|
|
T21 |
1617 |
|
T59 |
420 |
|
T62 |
231 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49447 |
1 |
|
|
T21 |
761 |
|
T59 |
495 |
|
T62 |
224 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45573 |
1 |
|
|
T21 |
547 |
|
T59 |
279 |
|
T62 |
841 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T21 |
33 |
|
T59 |
14 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T21 |
31 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T21 |
33 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T21 |
31 |
|
T59 |
12 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T21 |
33 |
|
T59 |
13 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T21 |
30 |
|
T59 |
12 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T21 |
33 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T21 |
31 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T21 |
30 |
|
T59 |
13 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
17 |
|
T59 |
9 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T21 |
29 |
|
T59 |
13 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
17 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T21 |
28 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T21 |
17 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T21 |
28 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T21 |
22 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T21 |
28 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T21 |
22 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T21 |
27 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T21 |
22 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T21 |
27 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T21 |
26 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
15 |
|
T59 |
7 |
|
T62 |
2 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T21 |
26 |
|
T59 |
10 |
|
T62 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1059 |
1 |
|
|
T21 |
19 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53109 |
1 |
|
|
T21 |
1796 |
|
T59 |
419 |
|
T62 |
1137 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36859 |
1 |
|
|
T21 |
597 |
|
T59 |
387 |
|
T62 |
110 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
46092 |
1 |
|
|
T21 |
720 |
|
T59 |
223 |
|
T62 |
416 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50540 |
1 |
|
|
T21 |
626 |
|
T59 |
1310 |
|
T62 |
161 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T21 |
34 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T21 |
33 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T21 |
33 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T21 |
31 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T21 |
33 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T21 |
31 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T21 |
32 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T21 |
31 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T21 |
31 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T21 |
29 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T21 |
31 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T21 |
28 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T21 |
31 |
|
T59 |
19 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T21 |
28 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T21 |
31 |
|
T59 |
19 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T21 |
28 |
|
T59 |
18 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T21 |
30 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T21 |
30 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
11 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T21 |
30 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T21 |
28 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T21 |
27 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T21 |
27 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T21 |
26 |
|
T59 |
15 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1088 |
1 |
|
|
T21 |
26 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1094 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
10 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1054 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T21 |
11 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1062 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50140 |
1 |
|
|
T21 |
767 |
|
T59 |
1479 |
|
T62 |
135 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41073 |
1 |
|
|
T21 |
616 |
|
T59 |
171 |
|
T62 |
275 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51155 |
1 |
|
|
T21 |
771 |
|
T59 |
632 |
|
T62 |
437 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43792 |
1 |
|
|
T21 |
1555 |
|
T59 |
274 |
|
T62 |
941 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T21 |
35 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T21 |
37 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T21 |
34 |
|
T59 |
9 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T21 |
37 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T21 |
34 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T21 |
37 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T21 |
32 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T21 |
35 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T21 |
32 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T21 |
34 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T21 |
31 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T21 |
10 |
|
T59 |
7 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T21 |
34 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T21 |
31 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T21 |
29 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T21 |
27 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T21 |
27 |
|
T59 |
7 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T21 |
29 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T21 |
27 |
|
T59 |
6 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T21 |
27 |
|
T59 |
5 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T21 |
26 |
|
T59 |
5 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T21 |
25 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T21 |
26 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
11 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1070 |
1 |
|
|
T21 |
26 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
10 |
|
T59 |
6 |
|
T62 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1079 |
1 |
|
|
T21 |
24 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51690 |
1 |
|
|
T21 |
515 |
|
T59 |
1480 |
|
T62 |
30 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50090 |
1 |
|
|
T21 |
858 |
|
T59 |
218 |
|
T62 |
1065 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47282 |
1 |
|
|
T21 |
513 |
|
T59 |
511 |
|
T62 |
274 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
36962 |
1 |
|
|
T21 |
1813 |
|
T59 |
267 |
|
T62 |
321 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T21 |
38 |
|
T59 |
14 |
|
T62 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T21 |
37 |
|
T59 |
13 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T21 |
37 |
|
T59 |
14 |
|
T62 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T21 |
36 |
|
T59 |
13 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T21 |
37 |
|
T59 |
14 |
|
T62 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T21 |
36 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T21 |
36 |
|
T59 |
14 |
|
T62 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T21 |
34 |
|
T59 |
12 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T21 |
36 |
|
T59 |
14 |
|
T62 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T21 |
36 |
|
T59 |
13 |
|
T62 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T21 |
36 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T21 |
34 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T21 |
33 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T21 |
32 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T21 |
9 |
|
T59 |
7 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T21 |
32 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T21 |
31 |
|
T59 |
12 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T21 |
31 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T21 |
30 |
|
T59 |
12 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T21 |
30 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T21 |
30 |
|
T59 |
11 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T21 |
30 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T21 |
29 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
7 |
|
T59 |
6 |
|
T62 |
1 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1082 |
1 |
|
|
T21 |
29 |
|
T59 |
10 |
|
T62 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
9 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1043 |
1 |
|
|
T21 |
27 |
|
T59 |
12 |
|
T62 |
13 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47451 |
1 |
|
|
T21 |
922 |
|
T59 |
283 |
|
T62 |
456 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43943 |
1 |
|
|
T21 |
271 |
|
T59 |
1255 |
|
T62 |
128 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56068 |
1 |
|
|
T21 |
2022 |
|
T59 |
512 |
|
T62 |
984 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39936 |
1 |
|
|
T21 |
581 |
|
T59 |
397 |
|
T62 |
189 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T21 |
20 |
|
T59 |
17 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T21 |
17 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T21 |
16 |
|
T59 |
17 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T21 |
15 |
|
T59 |
17 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T21 |
24 |
|
T59 |
5 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T21 |
15 |
|
T59 |
16 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
24 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T21 |
14 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
24 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T21 |
14 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T21 |
16 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T21 |
12 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T21 |
16 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T21 |
10 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1095 |
1 |
|
|
T21 |
10 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1071 |
1 |
|
|
T21 |
10 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1069 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1052 |
1 |
|
|
T21 |
10 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1043 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T21 |
21 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1031 |
1 |
|
|
T21 |
10 |
|
T59 |
12 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
23 |
|
T59 |
4 |
|
T62 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1013 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53995 |
1 |
|
|
T21 |
701 |
|
T59 |
301 |
|
T62 |
415 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37586 |
1 |
|
|
T21 |
1530 |
|
T59 |
421 |
|
T62 |
104 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48009 |
1 |
|
|
T21 |
1092 |
|
T59 |
334 |
|
T62 |
1145 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47391 |
1 |
|
|
T21 |
531 |
|
T59 |
1322 |
|
T62 |
120 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T21 |
22 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T21 |
22 |
|
T59 |
19 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T21 |
22 |
|
T59 |
20 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T21 |
22 |
|
T59 |
19 |
|
T62 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T21 |
20 |
|
T59 |
18 |
|
T62 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T21 |
21 |
|
T59 |
18 |
|
T62 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T21 |
20 |
|
T59 |
18 |
|
T62 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T21 |
17 |
|
T59 |
6 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T21 |
20 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T21 |
20 |
|
T59 |
18 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
17 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T21 |
20 |
|
T59 |
19 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T21 |
19 |
|
T59 |
18 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
17 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T21 |
19 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T21 |
19 |
|
T59 |
18 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T21 |
19 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T21 |
18 |
|
T59 |
15 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1096 |
1 |
|
|
T21 |
19 |
|
T59 |
15 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T21 |
18 |
|
T59 |
15 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1083 |
1 |
|
|
T21 |
19 |
|
T59 |
15 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T21 |
17 |
|
T59 |
14 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1048 |
1 |
|
|
T21 |
19 |
|
T59 |
15 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1042 |
1 |
|
|
T21 |
16 |
|
T59 |
14 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1029 |
1 |
|
|
T21 |
17 |
|
T59 |
15 |
|
T62 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T21 |
16 |
|
T59 |
4 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1020 |
1 |
|
|
T21 |
16 |
|
T59 |
14 |
|
T62 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1004 |
1 |
|
|
T21 |
17 |
|
T59 |
15 |
|
T62 |
5 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49905 |
1 |
|
|
T21 |
716 |
|
T59 |
322 |
|
T62 |
212 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41469 |
1 |
|
|
T21 |
628 |
|
T59 |
243 |
|
T62 |
184 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53845 |
1 |
|
|
T21 |
1752 |
|
T59 |
414 |
|
T62 |
1137 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40929 |
1 |
|
|
T21 |
691 |
|
T59 |
1423 |
|
T62 |
260 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T21 |
29 |
|
T59 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T21 |
31 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T21 |
30 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T21 |
26 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T21 |
28 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T21 |
25 |
|
T59 |
15 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T21 |
27 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T21 |
13 |
|
T59 |
9 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T21 |
26 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T21 |
23 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T21 |
26 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
13 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T21 |
23 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
598 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T21 |
22 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
598 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T21 |
25 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
608 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T21 |
21 |
|
T59 |
11 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1109 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T21 |
20 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T21 |
24 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
14 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T21 |
19 |
|
T59 |
8 |
|
T62 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T21 |
12 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1054 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
7 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47437 |
1 |
|
|
T21 |
2052 |
|
T59 |
474 |
|
T62 |
307 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40016 |
1 |
|
|
T21 |
505 |
|
T59 |
273 |
|
T62 |
359 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53160 |
1 |
|
|
T21 |
763 |
|
T59 |
1392 |
|
T62 |
150 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45245 |
1 |
|
|
T21 |
561 |
|
T59 |
280 |
|
T62 |
928 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T21 |
23 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T21 |
27 |
|
T59 |
11 |
|
T62 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T21 |
22 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T21 |
22 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T21 |
26 |
|
T59 |
11 |
|
T62 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T21 |
22 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T21 |
25 |
|
T59 |
10 |
|
T62 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T21 |
23 |
|
T59 |
10 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T21 |
21 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T21 |
23 |
|
T59 |
10 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T21 |
23 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T21 |
23 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T21 |
19 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T21 |
23 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T21 |
19 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1073 |
1 |
|
|
T21 |
19 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1091 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1034 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T21 |
11 |
|
T59 |
11 |
|
T62 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1063 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
11 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56252 |
1 |
|
|
T21 |
1827 |
|
T59 |
407 |
|
T62 |
932 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40197 |
1 |
|
|
T21 |
411 |
|
T59 |
441 |
|
T62 |
339 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51420 |
1 |
|
|
T21 |
1143 |
|
T59 |
294 |
|
T62 |
397 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39291 |
1 |
|
|
T21 |
507 |
|
T59 |
1179 |
|
T62 |
198 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T21 |
21 |
|
T59 |
18 |
|
T62 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T21 |
21 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T21 |
20 |
|
T59 |
18 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T21 |
21 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T21 |
20 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T21 |
21 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T21 |
20 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T21 |
21 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T21 |
20 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T21 |
20 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T21 |
20 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T21 |
16 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T21 |
20 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T21 |
20 |
|
T59 |
14 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T21 |
17 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T21 |
15 |
|
T59 |
9 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T21 |
20 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T21 |
17 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
8 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T21 |
16 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
8 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1124 |
1 |
|
|
T21 |
19 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T21 |
16 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
15 |
|
T59 |
8 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T21 |
18 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1063 |
1 |
|
|
T21 |
14 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
15 |
|
T59 |
8 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T21 |
18 |
|
T59 |
11 |
|
T62 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
16 |
|
T59 |
8 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1032 |
1 |
|
|
T21 |
14 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T21 |
15 |
|
T59 |
8 |
|
T62 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1032 |
1 |
|
|
T21 |
17 |
|
T59 |
11 |
|
T62 |
7 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49605 |
1 |
|
|
T21 |
1143 |
|
T59 |
400 |
|
T62 |
1009 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44657 |
1 |
|
|
T21 |
333 |
|
T59 |
1073 |
|
T62 |
194 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54295 |
1 |
|
|
T21 |
730 |
|
T59 |
591 |
|
T62 |
305 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38038 |
1 |
|
|
T21 |
1627 |
|
T59 |
415 |
|
T62 |
240 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T21 |
26 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T21 |
25 |
|
T59 |
10 |
|
T62 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T21 |
26 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T21 |
25 |
|
T59 |
10 |
|
T62 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T21 |
25 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T21 |
24 |
|
T59 |
9 |
|
T62 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T21 |
23 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T21 |
22 |
|
T59 |
9 |
|
T62 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T21 |
22 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T21 |
20 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T21 |
20 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T21 |
20 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T21 |
21 |
|
T59 |
9 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T21 |
21 |
|
T59 |
8 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T21 |
19 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T21 |
17 |
|
T59 |
11 |
|
T62 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1109 |
1 |
|
|
T21 |
19 |
|
T59 |
8 |
|
T62 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1105 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1079 |
1 |
|
|
T21 |
19 |
|
T59 |
8 |
|
T62 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1077 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1055 |
1 |
|
|
T21 |
19 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T21 |
15 |
|
T59 |
6 |
|
T62 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T21 |
17 |
|
T59 |
10 |
|
T62 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T21 |
16 |
|
T59 |
10 |
|
T62 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1024 |
1 |
|
|
T21 |
19 |
|
T59 |
7 |
|
T62 |
9 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51094 |
1 |
|
|
T21 |
1780 |
|
T59 |
398 |
|
T62 |
254 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45802 |
1 |
|
|
T21 |
497 |
|
T59 |
406 |
|
T62 |
247 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49802 |
1 |
|
|
T21 |
1022 |
|
T59 |
268 |
|
T62 |
964 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40847 |
1 |
|
|
T21 |
621 |
|
T59 |
1340 |
|
T62 |
325 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T21 |
25 |
|
T59 |
17 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T21 |
25 |
|
T59 |
21 |
|
T62 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
3 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T21 |
24 |
|
T59 |
17 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T21 |
25 |
|
T59 |
21 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T21 |
23 |
|
T59 |
16 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T21 |
25 |
|
T59 |
21 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T21 |
22 |
|
T59 |
15 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T21 |
25 |
|
T59 |
21 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T21 |
22 |
|
T59 |
15 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T21 |
22 |
|
T59 |
14 |
|
T62 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T21 |
22 |
|
T59 |
19 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T21 |
19 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T21 |
22 |
|
T59 |
18 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T21 |
13 |
|
T59 |
3 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T21 |
20 |
|
T59 |
17 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T21 |
17 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T21 |
20 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1092 |
1 |
|
|
T21 |
16 |
|
T59 |
14 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T21 |
19 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1072 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T21 |
19 |
|
T59 |
16 |
|
T62 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T21 |
16 |
|
T59 |
13 |
|
T62 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1073 |
1 |
|
|
T21 |
19 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T21 |
13 |
|
T59 |
6 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1031 |
1 |
|
|
T21 |
15 |
|
T59 |
12 |
|
T62 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T21 |
13 |
|
T59 |
2 |
|
T62 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1053 |
1 |
|
|
T21 |
19 |
|
T59 |
16 |
|
T62 |
9 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56677 |
1 |
|
|
T21 |
609 |
|
T59 |
481 |
|
T62 |
198 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42569 |
1 |
|
|
T21 |
671 |
|
T59 |
286 |
|
T62 |
109 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
45974 |
1 |
|
|
T21 |
751 |
|
T59 |
1371 |
|
T62 |
268 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40977 |
1 |
|
|
T21 |
1724 |
|
T59 |
347 |
|
T62 |
1021 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T21 |
35 |
|
T59 |
16 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T21 |
36 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T21 |
35 |
|
T59 |
16 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T21 |
35 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T21 |
34 |
|
T59 |
15 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T21 |
35 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T21 |
33 |
|
T59 |
15 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T21 |
33 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T21 |
32 |
|
T59 |
15 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T21 |
32 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T21 |
30 |
|
T59 |
15 |
|
T62 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T21 |
31 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T21 |
29 |
|
T59 |
15 |
|
T62 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T21 |
29 |
|
T59 |
11 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T21 |
29 |
|
T59 |
15 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T21 |
10 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T21 |
28 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T21 |
29 |
|
T59 |
15 |
|
T62 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T21 |
27 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T21 |
29 |
|
T59 |
15 |
|
T62 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T21 |
27 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T21 |
24 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T21 |
28 |
|
T59 |
15 |
|
T62 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T21 |
24 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T21 |
24 |
|
T59 |
9 |
|
T62 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1069 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T21 |
24 |
|
T59 |
9 |
|
T62 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
595 |
1 |
|
|
T21 |
10 |
|
T59 |
3 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1039 |
1 |
|
|
T21 |
26 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T21 |
9 |
|
T59 |
9 |
|
T62 |
5 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T21 |
24 |
|
T59 |
8 |
|
T62 |
14 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
46693 |
1 |
|
|
T21 |
1938 |
|
T59 |
1237 |
|
T62 |
1166 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47430 |
1 |
|
|
T21 |
529 |
|
T59 |
279 |
|
T62 |
129 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52317 |
1 |
|
|
T21 |
1013 |
|
T59 |
446 |
|
T62 |
343 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40158 |
1 |
|
|
T21 |
373 |
|
T59 |
407 |
|
T62 |
174 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T21 |
23 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T21 |
18 |
|
T59 |
16 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T21 |
22 |
|
T59 |
20 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
603 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
606 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T21 |
21 |
|
T59 |
20 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T21 |
20 |
|
T59 |
19 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T21 |
19 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T21 |
16 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T21 |
18 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
596 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
598 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T21 |
17 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
596 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T21 |
18 |
|
T59 |
14 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
598 |
1 |
|
|
T21 |
15 |
|
T59 |
5 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T21 |
17 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
595 |
1 |
|
|
T21 |
15 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T21 |
17 |
|
T59 |
17 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T21 |
18 |
|
T59 |
13 |
|
T62 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
595 |
1 |
|
|
T21 |
15 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T21 |
17 |
|
T59 |
16 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T21 |
17 |
|
T59 |
13 |
|
T62 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T21 |
15 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T21 |
15 |
|
T59 |
16 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T21 |
16 |
|
T59 |
12 |
|
T62 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T21 |
15 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1092 |
1 |
|
|
T21 |
15 |
|
T59 |
16 |
|
T62 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
591 |
1 |
|
|
T21 |
20 |
|
T59 |
8 |
|
T62 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1068 |
1 |
|
|
T21 |
15 |
|
T59 |
11 |
|
T62 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T21 |
15 |
|
T59 |
4 |
|
T62 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1071 |
1 |
|
|
T21 |
15 |
|
T59 |
16 |
|
T62 |
4 |