Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8940339 |
1 |
|
|
T20 |
364 |
|
T1 |
465 |
|
T11 |
151 |
| auto[1] |
6740333 |
1 |
|
|
T1 |
749 |
|
T13 |
13 |
|
T2 |
38908 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12928283 |
1 |
|
|
T20 |
364 |
|
T1 |
777 |
|
T11 |
151 |
| auto[1] |
2752389 |
1 |
|
|
T1 |
437 |
|
T13 |
13 |
|
T2 |
14958 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8936550 |
1 |
|
|
T20 |
364 |
|
T1 |
628 |
|
T11 |
151 |
| auto[1] |
6744122 |
1 |
|
|
T1 |
586 |
|
T13 |
31 |
|
T2 |
39416 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2009452 |
1 |
|
|
T1 |
43 |
|
T13 |
13 |
|
T2 |
12518 |
| auto[1] |
auto[0] |
auto[1] |
1384050 |
1 |
|
|
T1 |
148 |
|
T13 |
13 |
|
T2 |
7764 |
| auto[1] |
auto[1] |
auto[0] |
1982281 |
1 |
|
|
T1 |
106 |
|
T13 |
5 |
|
T2 |
11940 |
| auto[1] |
auto[1] |
auto[1] |
1368339 |
1 |
|
|
T1 |
289 |
|
T2 |
7194 |
|
T3 |
6369 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |