Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8927151 |
1 |
|
|
T20 |
364 |
|
T1 |
600 |
|
T11 |
151 |
| auto[1] |
6753521 |
1 |
|
|
T1 |
614 |
|
T13 |
23 |
|
T2 |
38732 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12912329 |
1 |
|
|
T20 |
364 |
|
T1 |
701 |
|
T11 |
151 |
| auto[1] |
2768343 |
1 |
|
|
T1 |
513 |
|
T13 |
17 |
|
T2 |
14804 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8907257 |
1 |
|
|
T20 |
364 |
|
T1 |
558 |
|
T11 |
151 |
| auto[1] |
6773415 |
1 |
|
|
T1 |
656 |
|
T13 |
17 |
|
T2 |
38763 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2009216 |
1 |
|
|
T1 |
78 |
|
T2 |
12316 |
|
T3 |
3471 |
| auto[1] |
auto[0] |
auto[1] |
1386286 |
1 |
|
|
T1 |
286 |
|
T13 |
11 |
|
T2 |
7583 |
| auto[1] |
auto[1] |
auto[0] |
1995856 |
1 |
|
|
T1 |
65 |
|
T2 |
11643 |
|
T3 |
3537 |
| auto[1] |
auto[1] |
auto[1] |
1382057 |
1 |
|
|
T1 |
227 |
|
T13 |
6 |
|
T2 |
7221 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |