Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8923855 |
1 |
|
|
T20 |
364 |
|
T1 |
623 |
|
T11 |
151 |
| auto[1] |
6756817 |
1 |
|
|
T1 |
591 |
|
T13 |
37 |
|
T2 |
38685 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14810012 |
1 |
|
|
T20 |
364 |
|
T1 |
1199 |
|
T11 |
151 |
| auto[1] |
870660 |
1 |
|
|
T1 |
15 |
|
T13 |
1 |
|
T2 |
4575 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8945139 |
1 |
|
|
T20 |
364 |
|
T1 |
697 |
|
T11 |
151 |
| auto[1] |
6735533 |
1 |
|
|
T1 |
517 |
|
T13 |
53 |
|
T2 |
38535 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2944412 |
1 |
|
|
T1 |
219 |
|
T13 |
30 |
|
T2 |
17559 |
| auto[1] |
auto[0] |
auto[1] |
437598 |
1 |
|
|
T1 |
7 |
|
T2 |
2337 |
|
T3 |
1083 |
| auto[1] |
auto[1] |
auto[0] |
2920461 |
1 |
|
|
T1 |
283 |
|
T13 |
22 |
|
T2 |
16401 |
| auto[1] |
auto[1] |
auto[1] |
433062 |
1 |
|
|
T1 |
8 |
|
T13 |
1 |
|
T2 |
2238 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |