Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12797435	1			T31	324		T32	15907		T33	558903
all_values[1]	12797435	1			T31	324		T32	15907		T33	558903
all_values[2]	12797435	1			T31	324		T32	15907		T33	558903
all_values[3]	12797435	1			T31	324		T32	15907		T33	558903
all_values[4]	12797435	1			T31	324		T32	15907		T33	558903
all_values[5]	12797435	1			T31	324		T32	15907		T33	558903
all_values[6]	12797435	1			T31	324		T32	15907		T33	558903
all_values[7]	12797435	1			T31	324		T32	15907		T33	558903
all_values[8]	12797435	1			T31	324		T32	15907		T33	558903
all_values[9]	12797435	1			T31	324		T32	15907		T33	558903
all_values[10]	12797435	1			T31	324		T32	15907		T33	558903
all_values[11]	12797435	1			T31	324		T32	15907		T33	558903
all_values[12]	12797435	1			T31	324		T32	15907		T33	558903
all_values[13]	12797435	1			T31	324		T32	15907		T33	558903
all_values[14]	12797435	1			T31	324		T32	15907		T33	558903
all_values[15]	12797435	1			T31	324		T32	15907		T33	558903
all_values[16]	12797435	1			T31	324		T32	15907		T33	558903
all_values[17]	12797435	1			T31	324		T32	15907		T33	558903
all_values[18]	12797435	1			T31	324		T32	15907		T33	558903
all_values[19]	12797435	1			T31	324		T32	15907		T33	558903
all_values[20]	12797435	1			T31	324		T32	15907		T33	558903
all_values[21]	12797435	1			T31	324		T32	15907		T33	558903
all_values[22]	12797435	1			T31	324		T32	15907		T33	558903
all_values[23]	12797435	1			T31	324		T32	15907		T33	558903
all_values[24]	12797435	1			T31	324		T32	15907		T33	558903
all_values[25]	12797435	1			T31	324		T32	15907		T33	558903
all_values[26]	12797435	1			T31	324		T32	15907		T33	558903
all_values[27]	12797435	1			T31	324		T32	15907		T33	558903
all_values[28]	12797435	1			T31	324		T32	15907		T33	558903
all_values[29]	12797435	1			T31	324		T32	15907		T33	558903
all_values[30]	12797435	1			T31	324		T32	15907		T33	558903
all_values[31]	12797435	1			T31	324		T32	15907		T33	558903

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

239005151

1

T31

10368

T32

509024

T33

901566

auto[1]

170512769

1

T33

886923

T19

1175

T1

978

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

100984766

1

T31

10368

T32

509024

T33

176216

auto[1]

308533154

1

T33

161227

T19

1815

T1

1455

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2645431	1			T31	324		T32	15907		T33	29400
all_values[0]	auto[0]	auto[1]	4855957	1			T33	254599		T19	44		T1	26
all_values[0]	auto[1]	auto[0]	516811	1			T33	26249		T19	21		T1	14
all_values[0]	auto[1]	auto[1]	4779236	1			T33	248655		T19	17		T1	24
all_values[1]	auto[0]	auto[0]	2639007	1			T31	324		T32	15907		T33	26580
all_values[1]	auto[0]	auto[1]	4829285	1			T33	258363		T19	25		T1	26
all_values[1]	auto[1]	auto[0]	517595	1			T33	25156		T19	22		T1	22
all_values[1]	auto[1]	auto[1]	4811548	1			T33	248804		T19	13		T1	23
all_values[2]	auto[0]	auto[0]	2640733	1			T31	324		T32	15907		T33	30132
all_values[2]	auto[0]	auto[1]	4841136	1			T33	252596		T19	44		T1	24
all_values[2]	auto[1]	auto[0]	512794	1			T33	27013		T19	16		T1	22
all_values[2]	auto[1]	auto[1]	4802772	1			T33	249162		T19	24		T1	30
all_values[3]	auto[0]	auto[0]	2641532	1			T31	324		T32	15907		T33	27518
all_values[3]	auto[0]	auto[1]	4809999	1			T33	245901		T19	53		T1	37
all_values[3]	auto[1]	auto[0]	515431	1			T33	26606		T19	23		T1	1
all_values[3]	auto[1]	auto[1]	4830473	1			T33	258878		T19	11		T1	3
all_values[4]	auto[0]	auto[0]	2641315	1			T31	324		T32	15907		T33	26599
all_values[4]	auto[0]	auto[1]	4809727	1			T33	251015		T19	55		T1	10
all_values[4]	auto[1]	auto[0]	522153	1			T33	27383		T19	13		T1	24
all_values[4]	auto[1]	auto[1]	4824240	1			T33	253906		T19	1		T1	23
all_values[5]	auto[0]	auto[0]	2643423	1			T31	324		T32	15907		T33	28677
all_values[5]	auto[0]	auto[1]	4824882	1			T33	244508		T19	56		T1	33
all_values[5]	auto[1]	auto[0]	513806	1			T33	26897		T19	18		T1	21
all_values[5]	auto[1]	auto[1]	4815324	1			T33	258821		T19	4		T1	9
all_values[6]	auto[0]	auto[0]	2637696	1			T31	324		T32	15907		T33	28517
all_values[6]	auto[0]	auto[1]	4812268	1			T33	244218		T19	41		T1	18
all_values[6]	auto[1]	auto[0]	507831	1			T33	26089		T19	18		T1	17
all_values[6]	auto[1]	auto[1]	4839640	1			T33	260079		T19	28		T1	19
all_values[7]	auto[0]	auto[0]	2637277	1			T31	324		T32	15907		T33	28713
all_values[7]	auto[0]	auto[1]	4797189	1			T33	251397		T19	56		T1	19
all_values[7]	auto[1]	auto[0]	517946	1			T33	28455		T19	14		T1	22
all_values[7]	auto[1]	auto[1]	4845023	1			T33	250338		T19	7		T1	23
all_values[8]	auto[0]	auto[0]	2646671	1			T31	324		T32	15907		T33	28248
all_values[8]	auto[0]	auto[1]	4836412	1			T33	258507		T19	34		T1	26
all_values[8]	auto[1]	auto[0]	512461	1			T33	24174		T19	27		T1	17
all_values[8]	auto[1]	auto[1]	4801891	1			T33	247974		T19	20		T1	17
all_values[9]	auto[0]	auto[0]	2646382	1			T31	324		T32	15907		T33	31088
all_values[9]	auto[0]	auto[1]	4839595	1			T33	252337		T19	63		T1	24
all_values[9]	auto[1]	auto[0]	518009	1			T33	26192		T19	10		T1	12
all_values[9]	auto[1]	auto[1]	4793449	1			T33	249286		T19	3		T1	27
all_values[10]	auto[0]	auto[0]	2640626	1			T31	324		T32	15907		T33	27236
all_values[10]	auto[0]	auto[1]	4829303	1			T33	257439		T19	32		T1	28
all_values[10]	auto[1]	auto[0]	523121	1			T33	26973		T19	32		T1	10
all_values[10]	auto[1]	auto[1]	4804385	1			T33	247255		T19	18		T1	4
all_values[11]	auto[0]	auto[0]	2644742	1			T31	324		T32	15907		T33	28082
all_values[11]	auto[0]	auto[1]	4830601	1			T33	247133		T19	35		T1	44
all_values[11]	auto[1]	auto[0]	508704	1			T33	25792		T19	34		T12	1411
all_values[11]	auto[1]	auto[1]	4813388	1			T33	257896		T19	14		T1	8
all_values[12]	auto[0]	auto[0]	2635616	1			T31	324		T32	15907		T33	27626
all_values[12]	auto[0]	auto[1]	4846610	1			T33	260420		T19	43		T1	30
all_values[12]	auto[1]	auto[0]	518109	1			T33	26715		T19	21		T1	16
all_values[12]	auto[1]	auto[1]	4797100	1			T33	244142		T19	19		T1	17
all_values[13]	auto[0]	auto[0]	2635881	1			T31	324		T32	15907		T33	28626
all_values[13]	auto[0]	auto[1]	4811487	1			T33	256750		T19	35		T1	39
all_values[13]	auto[1]	auto[0]	515329	1			T33	25610		T19	21		T1	5
all_values[13]	auto[1]	auto[1]	4834738	1			T33	247917		T19	30		T1	1
all_values[14]	auto[0]	auto[0]	2635404	1			T31	324		T32	15907		T33	27440
all_values[14]	auto[0]	auto[1]	4825547	1			T33	254456		T19	36		T1	25
all_values[14]	auto[1]	auto[0]	513086	1			T33	27831		T19	30		T1	6
all_values[14]	auto[1]	auto[1]	4823398	1			T33	249176		T19	23		T1	27
all_values[15]	auto[0]	auto[0]	2643214	1			T31	324		T32	15907		T33	29614
all_values[15]	auto[0]	auto[1]	4841162	1			T33	251171		T19	52		T1	27
all_values[15]	auto[1]	auto[0]	511917	1			T33	26327		T19	21		T1	17
all_values[15]	auto[1]	auto[1]	4801142	1			T33	251791		T19	7		T1	22
all_values[16]	auto[0]	auto[0]	2640966	1			T31	324		T32	15907		T33	28277
all_values[16]	auto[0]	auto[1]	4835970	1			T33	254921		T19	33		T1	33
all_values[16]	auto[1]	auto[0]	511617	1			T33	29437		T19	31		T1	12
all_values[16]	auto[1]	auto[1]	4808882	1			T33	246268		T19	23		T1	26
all_values[17]	auto[0]	auto[0]	2634762	1			T31	324		T32	15907		T33	28355
all_values[17]	auto[0]	auto[1]	4807134	1			T33	260233		T19	61		T1	32
all_values[17]	auto[1]	auto[0]	514968	1			T33	24749		T19	7		T1	10
all_values[17]	auto[1]	auto[1]	4840571	1			T33	245566		T1	11		T12	13379
all_values[18]	auto[0]	auto[0]	2637324	1			T31	324		T32	15907		T33	26440
all_values[18]	auto[0]	auto[1]	4822611	1			T33	252432		T19	34		T1	22
all_values[18]	auto[1]	auto[0]	513283	1			T33	25925		T19	19		T1	22
all_values[18]	auto[1]	auto[1]	4824217	1			T33	254106		T19	7		T1	22
all_values[19]	auto[0]	auto[0]	2640774	1			T31	324		T32	15907		T33	31648
all_values[19]	auto[0]	auto[1]	4835748	1			T33	256206		T19	51		T1	30
all_values[19]	auto[1]	auto[0]	513907	1			T33	27422		T19	23		T1	9
all_values[19]	auto[1]	auto[1]	4807006	1			T33	243627		T19	9		T1	4
all_values[20]	auto[0]	auto[0]	2640133	1			T31	324		T32	15907		T33	28369
all_values[20]	auto[0]	auto[1]	4846040	1			T33	245480		T19	42		T1	22
all_values[20]	auto[1]	auto[0]	515236	1			T33	26504		T19	20		T1	22
all_values[20]	auto[1]	auto[1]	4796026	1			T33	258550		T19	16		T1	15
all_values[21]	auto[0]	auto[0]	2641111	1			T31	324		T32	15907		T33	29190
all_values[21]	auto[0]	auto[1]	4850695	1			T33	254061		T19	34		T1	25
all_values[21]	auto[1]	auto[0]	515392	1			T33	25034		T19	30		T1	11
all_values[21]	auto[1]	auto[1]	4790237	1			T33	250618		T19	20		T1	18
all_values[22]	auto[0]	auto[0]	2645626	1			T31	324		T32	15907		T33	28438
all_values[22]	auto[0]	auto[1]	4823620	1			T33	249005		T19	57		T1	36
all_values[22]	auto[1]	auto[0]	513078	1			T33	26632		T19	19		T1	15
all_values[22]	auto[1]	auto[1]	4815111	1			T33	254828		T19	8		T1	15
all_values[23]	auto[0]	auto[0]	2636034	1			T31	324		T32	15907		T33	31182
all_values[23]	auto[0]	auto[1]	4824635	1			T33	250180		T19	49		T1	42
all_values[23]	auto[1]	auto[0]	516591	1			T33	25690		T19	16		T1	7
all_values[23]	auto[1]	auto[1]	4820175	1			T33	251851		T19	27		T1	20
all_values[24]	auto[0]	auto[0]	2638254	1			T31	324		T32	15907		T33	30406
all_values[24]	auto[0]	auto[1]	4835788	1			T33	256664		T19	30		T1	30
all_values[24]	auto[1]	auto[0]	515845	1			T33	27262		T19	19		T1	7
all_values[24]	auto[1]	auto[1]	4807548	1			T33	244571		T19	8		T1	26
all_values[25]	auto[0]	auto[0]	2637315	1			T31	324		T32	15907		T33	29558
all_values[25]	auto[0]	auto[1]	4832579	1			T33	258220		T19	41		T1	25
all_values[25]	auto[1]	auto[0]	521250	1			T33	27091		T19	13		T1	12
all_values[25]	auto[1]	auto[1]	4806291	1			T33	244034		T19	11		T1	14
all_values[26]	auto[0]	auto[0]	2636252	1			T31	324		T32	15907		T33	28110
all_values[26]	auto[0]	auto[1]	4843680	1			T33	250352		T19	26		T1	28
all_values[26]	auto[1]	auto[0]	514003	1			T33	27715		T19	29		T1	22
all_values[26]	auto[1]	auto[1]	4803500	1			T33	252726		T19	31		T1	11
all_values[27]	auto[0]	auto[0]	2640203	1			T31	324		T32	15907		T33	28555
all_values[27]	auto[0]	auto[1]	4810549	1			T33	256221		T19	42		T1	16
all_values[27]	auto[1]	auto[0]	516379	1			T33	25984		T19	14		T1	12
all_values[27]	auto[1]	auto[1]	4830304	1			T33	248143		T19	5		T1	41
all_values[28]	auto[0]	auto[0]	2640151	1			T31	324		T32	15907		T33	27686
all_values[28]	auto[0]	auto[1]	4818296	1			T33	256024		T19	36		T1	23
all_values[28]	auto[1]	auto[0]	520648	1			T33	28295		T19	36		T1	9
all_values[28]	auto[1]	auto[1]	4818340	1			T33	246898		T19	13		T1	19
all_values[29]	auto[0]	auto[0]	2645252	1			T31	324		T32	15907		T33	30597
all_values[29]	auto[0]	auto[1]	4808088	1			T33	250507		T19	39		T1	46
all_values[29]	auto[1]	auto[0]	516610	1			T33	25202		T19	20		T1	9
all_values[29]	auto[1]	auto[1]	4827485	1			T33	252597		T19	22		T1	2
all_values[30]	auto[0]	auto[0]	2636207	1			T31	324		T32	15907		T33	27489
all_values[30]	auto[0]	auto[1]	4822614	1			T33	257324		T19	17		T1	29
all_values[30]	auto[1]	auto[0]	514567	1			T33	25194		T19	51		T1	6
all_values[30]	auto[1]	auto[1]	4824047	1			T33	248896		T19	10		T1	21
all_values[31]	auto[0]	auto[0]	2644102	1			T31	324		T32	15907		T33	27106
all_values[31]	auto[0]	auto[1]	4856528	1			T33	251524		T19	48		T1	32
all_values[31]	auto[1]	auto[0]	516873	1			T33	25067		T19	16		T1	19
all_values[31]	auto[1]	auto[1]	4779932	1			T33	255206		T19	22		T1	6