cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56186 |
1 |
|
|
T94 |
1944 |
|
T95 |
1556 |
|
T96 |
1532 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41815 |
1 |
|
|
T94 |
782 |
|
T95 |
651 |
|
T96 |
1821 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59648 |
1 |
|
|
T94 |
777 |
|
T95 |
2365 |
|
T96 |
1515 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40533 |
1 |
|
|
T94 |
996 |
|
T95 |
726 |
|
T96 |
929 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T94 |
36 |
|
T95 |
38 |
|
T96 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T94 |
39 |
|
T95 |
38 |
|
T96 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T94 |
33 |
|
T95 |
36 |
|
T96 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T94 |
39 |
|
T95 |
37 |
|
T96 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T94 |
31 |
|
T95 |
35 |
|
T96 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T94 |
38 |
|
T95 |
37 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T94 |
30 |
|
T95 |
35 |
|
T96 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T94 |
38 |
|
T95 |
37 |
|
T96 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T94 |
30 |
|
T95 |
35 |
|
T96 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T94 |
38 |
|
T95 |
36 |
|
T96 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T94 |
30 |
|
T95 |
35 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T94 |
37 |
|
T95 |
36 |
|
T96 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T94 |
30 |
|
T95 |
33 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T94 |
36 |
|
T95 |
36 |
|
T96 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T94 |
29 |
|
T95 |
33 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T94 |
17 |
|
T95 |
22 |
|
T96 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T94 |
36 |
|
T95 |
34 |
|
T96 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T94 |
29 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T94 |
29 |
|
T95 |
31 |
|
T96 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T94 |
36 |
|
T95 |
30 |
|
T96 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T94 |
29 |
|
T95 |
31 |
|
T96 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T94 |
35 |
|
T95 |
30 |
|
T96 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T94 |
28 |
|
T95 |
31 |
|
T96 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T94 |
34 |
|
T95 |
28 |
|
T96 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T94 |
28 |
|
T95 |
31 |
|
T96 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T94 |
26 |
|
T95 |
30 |
|
T96 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T94 |
24 |
|
T95 |
28 |
|
T96 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T94 |
16 |
|
T95 |
22 |
|
T96 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1084 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
33 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53687 |
1 |
|
|
T94 |
606 |
|
T95 |
786 |
|
T96 |
1294 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39665 |
1 |
|
|
T94 |
885 |
|
T95 |
711 |
|
T96 |
1785 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61964 |
1 |
|
|
T94 |
1930 |
|
T95 |
1985 |
|
T96 |
1142 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42559 |
1 |
|
|
T94 |
928 |
|
T95 |
1881 |
|
T96 |
1341 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T94 |
46 |
|
T95 |
38 |
|
T96 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T94 |
44 |
|
T95 |
37 |
|
T96 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T94 |
46 |
|
T95 |
38 |
|
T96 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T94 |
42 |
|
T95 |
37 |
|
T96 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T94 |
46 |
|
T95 |
37 |
|
T96 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T94 |
42 |
|
T95 |
35 |
|
T96 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T94 |
46 |
|
T95 |
36 |
|
T96 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T94 |
42 |
|
T95 |
35 |
|
T96 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T94 |
46 |
|
T95 |
35 |
|
T96 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T94 |
41 |
|
T95 |
35 |
|
T96 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T94 |
45 |
|
T95 |
34 |
|
T96 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T94 |
40 |
|
T95 |
35 |
|
T96 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T94 |
44 |
|
T95 |
32 |
|
T96 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T94 |
40 |
|
T95 |
35 |
|
T96 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T94 |
43 |
|
T95 |
32 |
|
T96 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T94 |
39 |
|
T95 |
35 |
|
T96 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T94 |
42 |
|
T95 |
30 |
|
T96 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T94 |
39 |
|
T95 |
35 |
|
T96 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T94 |
42 |
|
T95 |
28 |
|
T96 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T94 |
39 |
|
T95 |
34 |
|
T96 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T94 |
40 |
|
T95 |
28 |
|
T96 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T94 |
37 |
|
T95 |
34 |
|
T96 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T94 |
39 |
|
T95 |
28 |
|
T96 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T94 |
38 |
|
T95 |
27 |
|
T96 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T94 |
37 |
|
T95 |
27 |
|
T96 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T94 |
34 |
|
T95 |
33 |
|
T96 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T94 |
36 |
|
T95 |
26 |
|
T96 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T94 |
33 |
|
T95 |
33 |
|
T96 |
50 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57794 |
1 |
|
|
T94 |
1740 |
|
T95 |
1405 |
|
T96 |
1957 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44404 |
1 |
|
|
T94 |
953 |
|
T95 |
1138 |
|
T96 |
1068 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54605 |
1 |
|
|
T94 |
1103 |
|
T95 |
968 |
|
T96 |
2083 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43010 |
1 |
|
|
T94 |
716 |
|
T95 |
1820 |
|
T96 |
990 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T94 |
39 |
|
T95 |
44 |
|
T96 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T94 |
38 |
|
T95 |
46 |
|
T96 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T94 |
38 |
|
T95 |
44 |
|
T96 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T94 |
37 |
|
T95 |
46 |
|
T96 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T94 |
37 |
|
T95 |
45 |
|
T96 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T94 |
38 |
|
T95 |
40 |
|
T96 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T94 |
35 |
|
T95 |
44 |
|
T96 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T94 |
34 |
|
T95 |
42 |
|
T96 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T94 |
35 |
|
T95 |
38 |
|
T96 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T94 |
34 |
|
T95 |
40 |
|
T96 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T94 |
35 |
|
T95 |
37 |
|
T96 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T94 |
33 |
|
T95 |
40 |
|
T96 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T94 |
35 |
|
T95 |
36 |
|
T96 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T94 |
33 |
|
T95 |
36 |
|
T96 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T94 |
32 |
|
T95 |
36 |
|
T96 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T94 |
32 |
|
T95 |
36 |
|
T96 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T94 |
29 |
|
T95 |
38 |
|
T96 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T94 |
31 |
|
T95 |
35 |
|
T96 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T94 |
28 |
|
T95 |
38 |
|
T96 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T94 |
31 |
|
T95 |
34 |
|
T96 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T94 |
27 |
|
T95 |
38 |
|
T96 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T94 |
31 |
|
T95 |
33 |
|
T96 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T94 |
25 |
|
T95 |
38 |
|
T96 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T94 |
31 |
|
T95 |
32 |
|
T96 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T94 |
23 |
|
T95 |
38 |
|
T96 |
32 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51239 |
1 |
|
|
T94 |
1058 |
|
T95 |
1363 |
|
T96 |
1970 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45246 |
1 |
|
|
T94 |
698 |
|
T95 |
1770 |
|
T96 |
861 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59915 |
1 |
|
|
T94 |
2219 |
|
T95 |
1198 |
|
T96 |
1571 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42305 |
1 |
|
|
T94 |
669 |
|
T95 |
1076 |
|
T96 |
1077 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T94 |
29 |
|
T95 |
37 |
|
T96 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T94 |
33 |
|
T95 |
42 |
|
T96 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T94 |
29 |
|
T95 |
37 |
|
T96 |
58 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T94 |
33 |
|
T95 |
41 |
|
T96 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T94 |
29 |
|
T95 |
36 |
|
T96 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T94 |
31 |
|
T95 |
40 |
|
T96 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T94 |
31 |
|
T95 |
38 |
|
T96 |
60 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T94 |
26 |
|
T95 |
36 |
|
T96 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T94 |
31 |
|
T95 |
36 |
|
T96 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T94 |
25 |
|
T95 |
34 |
|
T96 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T94 |
31 |
|
T95 |
36 |
|
T96 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T94 |
25 |
|
T95 |
33 |
|
T96 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T94 |
29 |
|
T95 |
36 |
|
T96 |
56 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T94 |
25 |
|
T95 |
33 |
|
T96 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T94 |
29 |
|
T95 |
36 |
|
T96 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T94 |
24 |
|
T95 |
32 |
|
T96 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T94 |
29 |
|
T95 |
36 |
|
T96 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T94 |
23 |
|
T95 |
32 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T94 |
28 |
|
T95 |
35 |
|
T96 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T94 |
23 |
|
T95 |
31 |
|
T96 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T94 |
22 |
|
T95 |
30 |
|
T96 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
18 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T94 |
26 |
|
T95 |
35 |
|
T96 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T94 |
21 |
|
T95 |
28 |
|
T96 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T94 |
17 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T94 |
26 |
|
T95 |
33 |
|
T96 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T94 |
20 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T94 |
17 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T94 |
25 |
|
T95 |
32 |
|
T96 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T94 |
17 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T94 |
24 |
|
T95 |
31 |
|
T96 |
40 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53014 |
1 |
|
|
T94 |
1967 |
|
T95 |
1795 |
|
T96 |
1531 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42841 |
1 |
|
|
T94 |
869 |
|
T95 |
671 |
|
T96 |
1058 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59075 |
1 |
|
|
T94 |
1012 |
|
T95 |
1967 |
|
T96 |
1792 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43944 |
1 |
|
|
T94 |
712 |
|
T95 |
881 |
|
T96 |
1201 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T94 |
36 |
|
T95 |
35 |
|
T96 |
62 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T94 |
33 |
|
T95 |
37 |
|
T96 |
58 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T94 |
35 |
|
T95 |
33 |
|
T96 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T94 |
33 |
|
T95 |
37 |
|
T96 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T94 |
35 |
|
T95 |
32 |
|
T96 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T94 |
30 |
|
T95 |
37 |
|
T96 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T94 |
29 |
|
T95 |
37 |
|
T96 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T94 |
28 |
|
T95 |
37 |
|
T96 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T94 |
28 |
|
T95 |
37 |
|
T96 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T94 |
26 |
|
T95 |
37 |
|
T96 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T94 |
21 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T94 |
25 |
|
T95 |
36 |
|
T96 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T94 |
24 |
|
T95 |
35 |
|
T96 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T94 |
34 |
|
T95 |
30 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T94 |
22 |
|
T95 |
34 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T94 |
33 |
|
T95 |
29 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T94 |
21 |
|
T95 |
32 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T94 |
32 |
|
T95 |
29 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T94 |
21 |
|
T95 |
32 |
|
T96 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T94 |
20 |
|
T95 |
30 |
|
T96 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T94 |
31 |
|
T95 |
27 |
|
T96 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T94 |
20 |
|
T95 |
29 |
|
T96 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
22 |
|
T96 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1065 |
1 |
|
|
T94 |
31 |
|
T95 |
26 |
|
T96 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T94 |
20 |
|
T95 |
29 |
|
T96 |
44 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56804 |
1 |
|
|
T94 |
1191 |
|
T95 |
2416 |
|
T96 |
1216 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41924 |
1 |
|
|
T94 |
1304 |
|
T95 |
968 |
|
T96 |
1765 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55108 |
1 |
|
|
T94 |
1285 |
|
T95 |
872 |
|
T96 |
1516 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44004 |
1 |
|
|
T94 |
740 |
|
T95 |
969 |
|
T96 |
1215 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T94 |
28 |
|
T95 |
48 |
|
T96 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T94 |
28 |
|
T95 |
45 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T94 |
26 |
|
T95 |
47 |
|
T96 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T94 |
27 |
|
T95 |
43 |
|
T96 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T94 |
26 |
|
T95 |
46 |
|
T96 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T94 |
27 |
|
T95 |
43 |
|
T96 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T94 |
25 |
|
T95 |
46 |
|
T96 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T94 |
27 |
|
T95 |
41 |
|
T96 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T94 |
23 |
|
T95 |
46 |
|
T96 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T94 |
26 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T94 |
23 |
|
T95 |
45 |
|
T96 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T94 |
26 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T94 |
23 |
|
T95 |
45 |
|
T96 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T94 |
25 |
|
T95 |
36 |
|
T96 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T94 |
23 |
|
T95 |
44 |
|
T96 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
26 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T94 |
25 |
|
T95 |
35 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T94 |
22 |
|
T95 |
44 |
|
T96 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
25 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T94 |
22 |
|
T95 |
44 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
25 |
|
T95 |
18 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T94 |
26 |
|
T95 |
33 |
|
T96 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
25 |
|
T95 |
17 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
25 |
|
T95 |
17 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T94 |
26 |
|
T95 |
32 |
|
T96 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T94 |
21 |
|
T95 |
42 |
|
T96 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
25 |
|
T95 |
17 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T94 |
24 |
|
T95 |
32 |
|
T96 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T94 |
21 |
|
T95 |
42 |
|
T96 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
25 |
|
T95 |
17 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T94 |
24 |
|
T95 |
31 |
|
T96 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T94 |
26 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T94 |
21 |
|
T95 |
42 |
|
T96 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T94 |
25 |
|
T95 |
17 |
|
T96 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T94 |
23 |
|
T95 |
29 |
|
T96 |
40 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54975 |
1 |
|
|
T94 |
1911 |
|
T95 |
1214 |
|
T96 |
2658 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46264 |
1 |
|
|
T94 |
710 |
|
T95 |
1258 |
|
T96 |
1345 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59318 |
1 |
|
|
T94 |
1357 |
|
T95 |
916 |
|
T96 |
1176 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
36640 |
1 |
|
|
T94 |
628 |
|
T95 |
1778 |
|
T96 |
703 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T94 |
34 |
|
T95 |
49 |
|
T96 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T94 |
34 |
|
T95 |
46 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T94 |
34 |
|
T95 |
49 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T94 |
32 |
|
T95 |
46 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T94 |
33 |
|
T95 |
47 |
|
T96 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T94 |
32 |
|
T95 |
43 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T94 |
33 |
|
T95 |
46 |
|
T96 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T94 |
32 |
|
T95 |
42 |
|
T96 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T94 |
33 |
|
T95 |
45 |
|
T96 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T94 |
32 |
|
T95 |
41 |
|
T96 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T94 |
32 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T94 |
30 |
|
T95 |
41 |
|
T96 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T94 |
32 |
|
T95 |
44 |
|
T96 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
29 |
|
T95 |
41 |
|
T96 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T94 |
32 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T94 |
29 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T94 |
30 |
|
T95 |
42 |
|
T96 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T94 |
27 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T94 |
30 |
|
T95 |
41 |
|
T96 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T94 |
26 |
|
T95 |
40 |
|
T96 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T94 |
27 |
|
T95 |
41 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T94 |
26 |
|
T95 |
39 |
|
T96 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T94 |
26 |
|
T95 |
41 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T94 |
26 |
|
T95 |
38 |
|
T96 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T94 |
25 |
|
T95 |
41 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T94 |
26 |
|
T95 |
35 |
|
T96 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T94 |
25 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T94 |
25 |
|
T95 |
35 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T94 |
24 |
|
T95 |
39 |
|
T96 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T94 |
25 |
|
T95 |
34 |
|
T96 |
27 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56185 |
1 |
|
|
T94 |
1487 |
|
T95 |
1413 |
|
T96 |
1662 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39608 |
1 |
|
|
T94 |
490 |
|
T95 |
780 |
|
T96 |
921 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53706 |
1 |
|
|
T94 |
1884 |
|
T95 |
986 |
|
T96 |
2171 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47871 |
1 |
|
|
T94 |
828 |
|
T95 |
2041 |
|
T96 |
1109 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T94 |
25 |
|
T95 |
43 |
|
T96 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T94 |
27 |
|
T95 |
49 |
|
T96 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T94 |
25 |
|
T95 |
42 |
|
T96 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T94 |
27 |
|
T95 |
49 |
|
T96 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T94 |
25 |
|
T95 |
40 |
|
T96 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T94 |
27 |
|
T95 |
49 |
|
T96 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T94 |
24 |
|
T95 |
40 |
|
T96 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T94 |
27 |
|
T95 |
49 |
|
T96 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T94 |
24 |
|
T95 |
38 |
|
T96 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T94 |
26 |
|
T95 |
48 |
|
T96 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T94 |
23 |
|
T95 |
38 |
|
T96 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
26 |
|
T95 |
47 |
|
T96 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T94 |
21 |
|
T95 |
38 |
|
T96 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T94 |
26 |
|
T95 |
47 |
|
T96 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T94 |
21 |
|
T95 |
38 |
|
T96 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T94 |
21 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T94 |
25 |
|
T95 |
47 |
|
T96 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T94 |
21 |
|
T95 |
38 |
|
T96 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T94 |
20 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T94 |
25 |
|
T95 |
47 |
|
T96 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T94 |
21 |
|
T95 |
36 |
|
T96 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T94 |
20 |
|
T95 |
13 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T94 |
25 |
|
T95 |
47 |
|
T96 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T94 |
20 |
|
T95 |
34 |
|
T96 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
20 |
|
T95 |
12 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T94 |
25 |
|
T95 |
48 |
|
T96 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T94 |
17 |
|
T95 |
31 |
|
T96 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
20 |
|
T95 |
12 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T94 |
25 |
|
T95 |
48 |
|
T96 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
20 |
|
T95 |
12 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T94 |
25 |
|
T95 |
48 |
|
T96 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T94 |
16 |
|
T95 |
27 |
|
T96 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
20 |
|
T95 |
12 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T94 |
24 |
|
T95 |
46 |
|
T96 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T94 |
22 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T94 |
16 |
|
T95 |
25 |
|
T96 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
20 |
|
T95 |
12 |
|
T96 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T94 |
24 |
|
T95 |
43 |
|
T96 |
35 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56883 |
1 |
|
|
T94 |
897 |
|
T95 |
1181 |
|
T96 |
1506 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45255 |
1 |
|
|
T94 |
1274 |
|
T95 |
1883 |
|
T96 |
1541 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57413 |
1 |
|
|
T94 |
1557 |
|
T95 |
1112 |
|
T96 |
1051 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39333 |
1 |
|
|
T94 |
856 |
|
T95 |
952 |
|
T96 |
1500 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T94 |
30 |
|
T95 |
48 |
|
T96 |
68 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T94 |
31 |
|
T95 |
47 |
|
T96 |
68 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T94 |
30 |
|
T95 |
47 |
|
T96 |
68 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T94 |
31 |
|
T95 |
46 |
|
T96 |
68 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T94 |
30 |
|
T95 |
46 |
|
T96 |
64 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T94 |
31 |
|
T95 |
45 |
|
T96 |
66 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T94 |
29 |
|
T95 |
45 |
|
T96 |
61 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T94 |
31 |
|
T95 |
44 |
|
T96 |
64 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T94 |
28 |
|
T95 |
44 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
63 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T94 |
26 |
|
T95 |
44 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T94 |
29 |
|
T95 |
39 |
|
T96 |
61 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T94 |
25 |
|
T95 |
43 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T94 |
29 |
|
T95 |
38 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T94 |
23 |
|
T95 |
43 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
21 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
60 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T94 |
29 |
|
T95 |
34 |
|
T96 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
57 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T94 |
29 |
|
T95 |
33 |
|
T96 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T94 |
29 |
|
T95 |
32 |
|
T96 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T94 |
27 |
|
T95 |
32 |
|
T96 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T94 |
26 |
|
T95 |
31 |
|
T96 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T94 |
21 |
|
T95 |
43 |
|
T96 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T94 |
26 |
|
T95 |
29 |
|
T96 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T94 |
20 |
|
T95 |
40 |
|
T96 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
20 |
|
T95 |
20 |
|
T96 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1058 |
1 |
|
|
T94 |
25 |
|
T95 |
29 |
|
T96 |
47 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56708 |
1 |
|
|
T94 |
2072 |
|
T95 |
1183 |
|
T96 |
1426 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41240 |
1 |
|
|
T94 |
739 |
|
T95 |
729 |
|
T96 |
1079 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52581 |
1 |
|
|
T94 |
889 |
|
T95 |
2528 |
|
T96 |
1744 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47002 |
1 |
|
|
T94 |
798 |
|
T95 |
858 |
|
T96 |
1560 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T94 |
40 |
|
T95 |
36 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T94 |
36 |
|
T95 |
34 |
|
T96 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T94 |
40 |
|
T95 |
36 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T94 |
39 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T94 |
39 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T94 |
35 |
|
T95 |
32 |
|
T96 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T94 |
37 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T94 |
35 |
|
T95 |
29 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T94 |
36 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T94 |
34 |
|
T95 |
29 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T94 |
35 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T94 |
34 |
|
T95 |
28 |
|
T96 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T94 |
34 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
20 |
|
T95 |
26 |
|
T96 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T94 |
33 |
|
T95 |
28 |
|
T96 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T94 |
33 |
|
T95 |
32 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
19 |
|
T95 |
26 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T94 |
34 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T94 |
33 |
|
T95 |
30 |
|
T96 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
19 |
|
T95 |
26 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T94 |
33 |
|
T95 |
27 |
|
T96 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T94 |
30 |
|
T95 |
30 |
|
T96 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T94 |
19 |
|
T95 |
25 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T94 |
27 |
|
T95 |
28 |
|
T96 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T94 |
19 |
|
T95 |
25 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T94 |
25 |
|
T95 |
28 |
|
T96 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T94 |
19 |
|
T95 |
25 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T94 |
30 |
|
T95 |
26 |
|
T96 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T94 |
25 |
|
T95 |
28 |
|
T96 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T94 |
19 |
|
T95 |
25 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T94 |
29 |
|
T95 |
26 |
|
T96 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
16 |
|
T95 |
23 |
|
T96 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T94 |
25 |
|
T95 |
28 |
|
T96 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
19 |
|
T95 |
25 |
|
T96 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T94 |
29 |
|
T95 |
26 |
|
T96 |
36 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48528 |
1 |
|
|
T94 |
1009 |
|
T95 |
1140 |
|
T96 |
1062 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45886 |
1 |
|
|
T94 |
992 |
|
T95 |
766 |
|
T96 |
1835 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62715 |
1 |
|
|
T94 |
1104 |
|
T95 |
2825 |
|
T96 |
1657 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40648 |
1 |
|
|
T94 |
1540 |
|
T95 |
648 |
|
T96 |
1096 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T94 |
33 |
|
T95 |
27 |
|
T96 |
62 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T94 |
37 |
|
T95 |
31 |
|
T96 |
59 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T94 |
33 |
|
T95 |
26 |
|
T96 |
60 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T94 |
36 |
|
T95 |
31 |
|
T96 |
59 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T94 |
32 |
|
T95 |
26 |
|
T96 |
59 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T94 |
36 |
|
T95 |
30 |
|
T96 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T94 |
32 |
|
T95 |
26 |
|
T96 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T94 |
36 |
|
T95 |
29 |
|
T96 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T94 |
31 |
|
T95 |
26 |
|
T96 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T94 |
36 |
|
T95 |
29 |
|
T96 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T94 |
30 |
|
T95 |
25 |
|
T96 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T94 |
34 |
|
T95 |
28 |
|
T96 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T94 |
30 |
|
T95 |
25 |
|
T96 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T94 |
34 |
|
T95 |
27 |
|
T96 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T94 |
29 |
|
T95 |
25 |
|
T96 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T94 |
34 |
|
T95 |
25 |
|
T96 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T94 |
27 |
|
T95 |
24 |
|
T96 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T94 |
33 |
|
T95 |
23 |
|
T96 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T94 |
24 |
|
T95 |
24 |
|
T96 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T94 |
33 |
|
T95 |
23 |
|
T96 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T94 |
23 |
|
T95 |
24 |
|
T96 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T94 |
33 |
|
T95 |
23 |
|
T96 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T94 |
23 |
|
T95 |
24 |
|
T96 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T94 |
32 |
|
T95 |
23 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T94 |
23 |
|
T95 |
24 |
|
T96 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T94 |
29 |
|
T95 |
23 |
|
T96 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T94 |
23 |
|
T95 |
22 |
|
T96 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T94 |
14 |
|
T95 |
25 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1109 |
1 |
|
|
T94 |
29 |
|
T95 |
22 |
|
T96 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T94 |
17 |
|
T95 |
28 |
|
T96 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1107 |
1 |
|
|
T94 |
23 |
|
T95 |
20 |
|
T96 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T94 |
14 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1080 |
1 |
|
|
T94 |
29 |
|
T95 |
20 |
|
T96 |
39 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54823 |
1 |
|
|
T94 |
1929 |
|
T95 |
990 |
|
T96 |
1081 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40798 |
1 |
|
|
T94 |
753 |
|
T95 |
1053 |
|
T96 |
1284 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61417 |
1 |
|
|
T94 |
946 |
|
T95 |
1439 |
|
T96 |
1490 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42059 |
1 |
|
|
T94 |
885 |
|
T95 |
1719 |
|
T96 |
1869 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T94 |
34 |
|
T95 |
46 |
|
T96 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T94 |
32 |
|
T95 |
45 |
|
T96 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T94 |
34 |
|
T95 |
46 |
|
T96 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T94 |
32 |
|
T95 |
45 |
|
T96 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T94 |
33 |
|
T95 |
45 |
|
T96 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T94 |
30 |
|
T95 |
45 |
|
T96 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T94 |
33 |
|
T95 |
45 |
|
T96 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T94 |
30 |
|
T95 |
44 |
|
T96 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T94 |
32 |
|
T95 |
42 |
|
T96 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
30 |
|
T95 |
43 |
|
T96 |
57 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T94 |
31 |
|
T95 |
41 |
|
T96 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T94 |
30 |
|
T95 |
42 |
|
T96 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T94 |
31 |
|
T95 |
41 |
|
T96 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T94 |
28 |
|
T95 |
41 |
|
T96 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T94 |
31 |
|
T95 |
40 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
22 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T94 |
28 |
|
T95 |
41 |
|
T96 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T94 |
30 |
|
T95 |
36 |
|
T96 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T94 |
28 |
|
T95 |
39 |
|
T96 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T94 |
28 |
|
T95 |
37 |
|
T96 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T94 |
28 |
|
T95 |
36 |
|
T96 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T94 |
29 |
|
T95 |
34 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T94 |
28 |
|
T95 |
36 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T94 |
28 |
|
T95 |
33 |
|
T96 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T94 |
27 |
|
T95 |
33 |
|
T96 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1064 |
1 |
|
|
T94 |
27 |
|
T95 |
33 |
|
T96 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
21 |
|
T95 |
19 |
|
T96 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
44 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51840 |
1 |
|
|
T94 |
1027 |
|
T95 |
844 |
|
T96 |
2412 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49343 |
1 |
|
|
T94 |
1737 |
|
T95 |
1975 |
|
T96 |
895 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53482 |
1 |
|
|
T94 |
1056 |
|
T95 |
1110 |
|
T96 |
1487 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44159 |
1 |
|
|
T94 |
729 |
|
T95 |
1243 |
|
T96 |
1037 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T94 |
41 |
|
T95 |
55 |
|
T96 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T94 |
41 |
|
T95 |
53 |
|
T96 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T94 |
39 |
|
T95 |
54 |
|
T96 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T94 |
41 |
|
T95 |
52 |
|
T96 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T94 |
38 |
|
T95 |
50 |
|
T96 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T94 |
39 |
|
T95 |
51 |
|
T96 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T94 |
38 |
|
T95 |
49 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T94 |
38 |
|
T95 |
50 |
|
T96 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T94 |
38 |
|
T95 |
49 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T94 |
36 |
|
T95 |
48 |
|
T96 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T94 |
36 |
|
T95 |
49 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T94 |
35 |
|
T95 |
47 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T94 |
36 |
|
T95 |
47 |
|
T96 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T94 |
33 |
|
T95 |
47 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T94 |
35 |
|
T95 |
45 |
|
T96 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T94 |
33 |
|
T95 |
47 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T94 |
34 |
|
T95 |
44 |
|
T96 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T94 |
32 |
|
T95 |
46 |
|
T96 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T94 |
33 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
15 |
|
T95 |
14 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T94 |
32 |
|
T95 |
42 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T94 |
31 |
|
T95 |
41 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T94 |
32 |
|
T95 |
41 |
|
T96 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T94 |
30 |
|
T95 |
40 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T94 |
32 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
14 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T94 |
28 |
|
T95 |
40 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T94 |
32 |
|
T95 |
40 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
14 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T94 |
28 |
|
T95 |
40 |
|
T96 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T94 |
15 |
|
T95 |
12 |
|
T96 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T94 |
31 |
|
T95 |
38 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
14 |
|
T95 |
13 |
|
T96 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T94 |
28 |
|
T95 |
39 |
|
T96 |
32 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51554 |
1 |
|
|
T94 |
1205 |
|
T95 |
1173 |
|
T96 |
1397 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44909 |
1 |
|
|
T94 |
549 |
|
T95 |
1613 |
|
T96 |
1218 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59390 |
1 |
|
|
T94 |
999 |
|
T95 |
1388 |
|
T96 |
2378 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40485 |
1 |
|
|
T94 |
1693 |
|
T95 |
872 |
|
T96 |
834 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T94 |
37 |
|
T95 |
44 |
|
T96 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T94 |
36 |
|
T95 |
41 |
|
T96 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T94 |
37 |
|
T95 |
44 |
|
T96 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T94 |
35 |
|
T95 |
39 |
|
T96 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T94 |
37 |
|
T95 |
43 |
|
T96 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T94 |
35 |
|
T95 |
39 |
|
T96 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T94 |
36 |
|
T95 |
42 |
|
T96 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T94 |
33 |
|
T95 |
38 |
|
T96 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T94 |
36 |
|
T95 |
41 |
|
T96 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T94 |
33 |
|
T95 |
38 |
|
T96 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T94 |
35 |
|
T95 |
38 |
|
T96 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T94 |
33 |
|
T95 |
38 |
|
T96 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T94 |
32 |
|
T95 |
38 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T94 |
32 |
|
T95 |
37 |
|
T96 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T94 |
30 |
|
T95 |
38 |
|
T96 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T94 |
30 |
|
T95 |
37 |
|
T96 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T94 |
30 |
|
T95 |
37 |
|
T96 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T94 |
29 |
|
T95 |
36 |
|
T96 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T94 |
28 |
|
T95 |
37 |
|
T96 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T94 |
23 |
|
T95 |
27 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
23 |
|
T95 |
26 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T94 |
27 |
|
T95 |
35 |
|
T96 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T94 |
27 |
|
T95 |
36 |
|
T96 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
23 |
|
T95 |
26 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T94 |
26 |
|
T95 |
35 |
|
T96 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T94 |
26 |
|
T95 |
36 |
|
T96 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T94 |
23 |
|
T95 |
26 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T94 |
25 |
|
T95 |
34 |
|
T96 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T94 |
23 |
|
T95 |
26 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T94 |
24 |
|
T95 |
33 |
|
T96 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T94 |
21 |
|
T95 |
24 |
|
T96 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T94 |
26 |
|
T95 |
33 |
|
T96 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
23 |
|
T95 |
26 |
|
T96 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T94 |
24 |
|
T95 |
30 |
|
T96 |
29 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54687 |
1 |
|
|
T94 |
986 |
|
T95 |
1328 |
|
T96 |
1423 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40300 |
1 |
|
|
T94 |
1465 |
|
T95 |
954 |
|
T96 |
1218 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55369 |
1 |
|
|
T94 |
1169 |
|
T95 |
981 |
|
T96 |
1259 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47596 |
1 |
|
|
T94 |
872 |
|
T95 |
1975 |
|
T96 |
1802 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T94 |
42 |
|
T95 |
52 |
|
T96 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T94 |
41 |
|
T95 |
50 |
|
T96 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T94 |
42 |
|
T95 |
49 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T94 |
40 |
|
T95 |
48 |
|
T96 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T94 |
41 |
|
T95 |
49 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T94 |
40 |
|
T95 |
46 |
|
T96 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T94 |
40 |
|
T95 |
44 |
|
T96 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T94 |
39 |
|
T95 |
44 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T94 |
40 |
|
T95 |
44 |
|
T96 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T94 |
40 |
|
T95 |
42 |
|
T96 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T94 |
38 |
|
T95 |
42 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T94 |
39 |
|
T95 |
40 |
|
T96 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T94 |
37 |
|
T95 |
42 |
|
T96 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T94 |
39 |
|
T95 |
38 |
|
T96 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T94 |
36 |
|
T95 |
40 |
|
T96 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T94 |
37 |
|
T95 |
35 |
|
T96 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T94 |
35 |
|
T95 |
39 |
|
T96 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T94 |
35 |
|
T95 |
32 |
|
T96 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T94 |
34 |
|
T95 |
39 |
|
T96 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T94 |
35 |
|
T95 |
31 |
|
T96 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T94 |
34 |
|
T95 |
39 |
|
T96 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T94 |
33 |
|
T95 |
30 |
|
T96 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T94 |
34 |
|
T95 |
37 |
|
T96 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T94 |
31 |
|
T95 |
30 |
|
T96 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T94 |
34 |
|
T95 |
37 |
|
T96 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T94 |
30 |
|
T95 |
30 |
|
T96 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T94 |
34 |
|
T95 |
37 |
|
T96 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T94 |
30 |
|
T95 |
30 |
|
T96 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T94 |
15 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T94 |
32 |
|
T95 |
37 |
|
T96 |
36 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55548 |
1 |
|
|
T94 |
1074 |
|
T95 |
1139 |
|
T96 |
1221 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43888 |
1 |
|
|
T94 |
656 |
|
T95 |
1037 |
|
T96 |
1141 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55447 |
1 |
|
|
T94 |
1925 |
|
T95 |
1278 |
|
T96 |
1313 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43617 |
1 |
|
|
T94 |
870 |
|
T95 |
1627 |
|
T96 |
1944 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T94 |
31 |
|
T95 |
52 |
|
T96 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T94 |
33 |
|
T95 |
52 |
|
T96 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T94 |
31 |
|
T95 |
50 |
|
T96 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T94 |
33 |
|
T95 |
51 |
|
T96 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T94 |
31 |
|
T95 |
49 |
|
T96 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T94 |
33 |
|
T95 |
48 |
|
T96 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T94 |
31 |
|
T95 |
48 |
|
T96 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T94 |
31 |
|
T95 |
48 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T94 |
30 |
|
T95 |
47 |
|
T96 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T94 |
29 |
|
T95 |
47 |
|
T96 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T94 |
28 |
|
T95 |
45 |
|
T96 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T94 |
29 |
|
T95 |
47 |
|
T96 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T94 |
28 |
|
T95 |
45 |
|
T96 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T94 |
29 |
|
T95 |
47 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T94 |
28 |
|
T95 |
45 |
|
T96 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T94 |
29 |
|
T95 |
46 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T94 |
28 |
|
T95 |
44 |
|
T96 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T94 |
29 |
|
T95 |
44 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T94 |
27 |
|
T95 |
40 |
|
T96 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T94 |
21 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T94 |
28 |
|
T95 |
44 |
|
T96 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T94 |
27 |
|
T95 |
39 |
|
T96 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T94 |
21 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T94 |
27 |
|
T95 |
45 |
|
T96 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T94 |
27 |
|
T95 |
38 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T94 |
21 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T94 |
26 |
|
T95 |
41 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T94 |
27 |
|
T95 |
37 |
|
T96 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T94 |
21 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T94 |
25 |
|
T95 |
40 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T94 |
27 |
|
T95 |
35 |
|
T96 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T94 |
21 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T94 |
24 |
|
T95 |
39 |
|
T96 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T94 |
22 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T94 |
27 |
|
T95 |
35 |
|
T96 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T94 |
21 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T94 |
24 |
|
T95 |
39 |
|
T96 |
44 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59226 |
1 |
|
|
T94 |
1686 |
|
T95 |
1445 |
|
T96 |
1981 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37827 |
1 |
|
|
T94 |
835 |
|
T95 |
907 |
|
T96 |
790 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58014 |
1 |
|
|
T94 |
1317 |
|
T95 |
2009 |
|
T96 |
1973 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44624 |
1 |
|
|
T94 |
835 |
|
T95 |
881 |
|
T96 |
1162 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T94 |
42 |
|
T95 |
40 |
|
T96 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T94 |
41 |
|
T95 |
42 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T94 |
41 |
|
T95 |
39 |
|
T96 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T94 |
40 |
|
T95 |
42 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T94 |
41 |
|
T95 |
39 |
|
T96 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T94 |
39 |
|
T95 |
39 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T94 |
39 |
|
T95 |
39 |
|
T96 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T94 |
37 |
|
T95 |
39 |
|
T96 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T94 |
39 |
|
T95 |
38 |
|
T96 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T94 |
35 |
|
T95 |
38 |
|
T96 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T94 |
39 |
|
T95 |
37 |
|
T96 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T94 |
34 |
|
T95 |
37 |
|
T96 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T94 |
39 |
|
T95 |
35 |
|
T96 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T94 |
33 |
|
T95 |
34 |
|
T96 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T94 |
37 |
|
T95 |
34 |
|
T96 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
11 |
|
T95 |
21 |
|
T96 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T94 |
33 |
|
T95 |
34 |
|
T96 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T94 |
37 |
|
T95 |
33 |
|
T96 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T94 |
33 |
|
T95 |
34 |
|
T96 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T94 |
35 |
|
T95 |
32 |
|
T96 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T94 |
34 |
|
T95 |
30 |
|
T96 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T94 |
33 |
|
T95 |
30 |
|
T96 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T94 |
32 |
|
T95 |
29 |
|
T96 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T94 |
28 |
|
T95 |
32 |
|
T96 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T94 |
30 |
|
T95 |
29 |
|
T96 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T94 |
28 |
|
T95 |
31 |
|
T96 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
10 |
|
T95 |
22 |
|
T96 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T94 |
30 |
|
T95 |
28 |
|
T96 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
10 |
|
T95 |
21 |
|
T96 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T94 |
27 |
|
T95 |
31 |
|
T96 |
40 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52508 |
1 |
|
|
T94 |
1111 |
|
T95 |
1087 |
|
T96 |
1169 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51071 |
1 |
|
|
T94 |
733 |
|
T95 |
1821 |
|
T96 |
2068 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50558 |
1 |
|
|
T94 |
2049 |
|
T95 |
1146 |
|
T96 |
1414 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43238 |
1 |
|
|
T94 |
824 |
|
T95 |
1180 |
|
T96 |
1053 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T94 |
33 |
|
T95 |
52 |
|
T96 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T94 |
30 |
|
T95 |
48 |
|
T96 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T94 |
32 |
|
T95 |
49 |
|
T96 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T94 |
30 |
|
T95 |
47 |
|
T96 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T94 |
32 |
|
T95 |
46 |
|
T96 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T94 |
29 |
|
T95 |
47 |
|
T96 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T94 |
32 |
|
T95 |
44 |
|
T96 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T94 |
29 |
|
T95 |
47 |
|
T96 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T94 |
32 |
|
T95 |
44 |
|
T96 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T94 |
28 |
|
T95 |
46 |
|
T96 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T94 |
31 |
|
T95 |
44 |
|
T96 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T94 |
26 |
|
T95 |
45 |
|
T96 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T94 |
30 |
|
T95 |
42 |
|
T96 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T94 |
23 |
|
T95 |
45 |
|
T96 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T94 |
28 |
|
T95 |
41 |
|
T96 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T94 |
22 |
|
T95 |
45 |
|
T96 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T94 |
28 |
|
T95 |
40 |
|
T96 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T94 |
23 |
|
T95 |
45 |
|
T96 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T94 |
28 |
|
T95 |
39 |
|
T96 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T94 |
23 |
|
T95 |
45 |
|
T96 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T94 |
27 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T94 |
23 |
|
T95 |
44 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T94 |
27 |
|
T95 |
38 |
|
T96 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T94 |
23 |
|
T95 |
44 |
|
T96 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T94 |
27 |
|
T95 |
37 |
|
T96 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T94 |
21 |
|
T95 |
44 |
|
T96 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T94 |
26 |
|
T95 |
36 |
|
T96 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T94 |
19 |
|
T95 |
43 |
|
T96 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T94 |
15 |
|
T95 |
11 |
|
T96 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T94 |
26 |
|
T95 |
35 |
|
T96 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T94 |
19 |
|
T95 |
43 |
|
T96 |
38 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53397 |
1 |
|
|
T94 |
2274 |
|
T95 |
2304 |
|
T96 |
1949 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44601 |
1 |
|
|
T94 |
810 |
|
T95 |
884 |
|
T96 |
1256 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52581 |
1 |
|
|
T94 |
906 |
|
T95 |
1223 |
|
T96 |
1281 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47920 |
1 |
|
|
T94 |
685 |
|
T95 |
923 |
|
T96 |
1186 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T94 |
37 |
|
T95 |
38 |
|
T96 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T94 |
37 |
|
T95 |
43 |
|
T96 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T94 |
35 |
|
T95 |
38 |
|
T96 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T94 |
36 |
|
T95 |
42 |
|
T96 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T94 |
35 |
|
T95 |
38 |
|
T96 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T94 |
34 |
|
T95 |
42 |
|
T96 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T94 |
34 |
|
T95 |
36 |
|
T96 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T94 |
34 |
|
T95 |
40 |
|
T96 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T94 |
34 |
|
T95 |
35 |
|
T96 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T94 |
31 |
|
T95 |
40 |
|
T96 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T94 |
33 |
|
T95 |
35 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T94 |
29 |
|
T95 |
39 |
|
T96 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T94 |
32 |
|
T95 |
34 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T94 |
28 |
|
T95 |
39 |
|
T96 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T94 |
32 |
|
T95 |
34 |
|
T96 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T94 |
28 |
|
T95 |
37 |
|
T96 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T94 |
31 |
|
T95 |
33 |
|
T96 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T94 |
26 |
|
T95 |
36 |
|
T96 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T94 |
14 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T94 |
25 |
|
T95 |
34 |
|
T96 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T94 |
25 |
|
T95 |
33 |
|
T96 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T94 |
29 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T94 |
25 |
|
T95 |
31 |
|
T96 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T94 |
14 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T94 |
28 |
|
T95 |
32 |
|
T96 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T94 |
25 |
|
T95 |
31 |
|
T96 |
42 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51832 |
1 |
|
|
T94 |
1018 |
|
T95 |
1970 |
|
T96 |
1192 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45284 |
1 |
|
|
T94 |
697 |
|
T95 |
909 |
|
T96 |
1264 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50144 |
1 |
|
|
T94 |
2112 |
|
T95 |
1249 |
|
T96 |
1107 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49369 |
1 |
|
|
T94 |
790 |
|
T95 |
1045 |
|
T96 |
1904 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T94 |
32 |
|
T95 |
47 |
|
T96 |
71 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T94 |
34 |
|
T95 |
45 |
|
T96 |
66 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T94 |
30 |
|
T95 |
47 |
|
T96 |
71 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T94 |
34 |
|
T95 |
44 |
|
T96 |
65 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T94 |
29 |
|
T95 |
45 |
|
T96 |
66 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T94 |
33 |
|
T95 |
44 |
|
T96 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T94 |
29 |
|
T95 |
45 |
|
T96 |
62 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T94 |
33 |
|
T95 |
43 |
|
T96 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T94 |
29 |
|
T95 |
43 |
|
T96 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T94 |
33 |
|
T95 |
43 |
|
T96 |
63 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T94 |
29 |
|
T95 |
43 |
|
T96 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T94 |
33 |
|
T95 |
43 |
|
T96 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T94 |
28 |
|
T95 |
43 |
|
T96 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T94 |
32 |
|
T95 |
41 |
|
T96 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T94 |
27 |
|
T95 |
43 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T94 |
31 |
|
T95 |
38 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T94 |
27 |
|
T95 |
43 |
|
T96 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T94 |
26 |
|
T95 |
42 |
|
T96 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T94 |
26 |
|
T95 |
42 |
|
T96 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T94 |
31 |
|
T95 |
34 |
|
T96 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T94 |
26 |
|
T95 |
41 |
|
T96 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T94 |
31 |
|
T95 |
33 |
|
T96 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T94 |
25 |
|
T95 |
39 |
|
T96 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T94 |
30 |
|
T95 |
32 |
|
T96 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T94 |
25 |
|
T95 |
38 |
|
T96 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T94 |
28 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
18 |
|
T95 |
17 |
|
T96 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T94 |
24 |
|
T95 |
36 |
|
T96 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T94 |
28 |
|
T95 |
32 |
|
T96 |
44 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55683 |
1 |
|
|
T94 |
1025 |
|
T95 |
1596 |
|
T96 |
1329 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43557 |
1 |
|
|
T94 |
1026 |
|
T95 |
748 |
|
T96 |
1092 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52382 |
1 |
|
|
T94 |
1594 |
|
T95 |
1963 |
|
T96 |
1350 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46604 |
1 |
|
|
T94 |
873 |
|
T95 |
1142 |
|
T96 |
1883 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T94 |
45 |
|
T95 |
37 |
|
T96 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T94 |
46 |
|
T95 |
40 |
|
T96 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T94 |
45 |
|
T95 |
35 |
|
T96 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T94 |
43 |
|
T95 |
39 |
|
T96 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T94 |
44 |
|
T95 |
34 |
|
T96 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T94 |
43 |
|
T95 |
39 |
|
T96 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T94 |
42 |
|
T95 |
33 |
|
T96 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T94 |
43 |
|
T95 |
39 |
|
T96 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T94 |
42 |
|
T95 |
32 |
|
T96 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T94 |
41 |
|
T95 |
38 |
|
T96 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T94 |
42 |
|
T95 |
30 |
|
T96 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T94 |
39 |
|
T95 |
36 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T94 |
42 |
|
T95 |
30 |
|
T96 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T94 |
38 |
|
T95 |
36 |
|
T96 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T94 |
42 |
|
T95 |
29 |
|
T96 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T94 |
37 |
|
T95 |
36 |
|
T96 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T94 |
42 |
|
T95 |
29 |
|
T96 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T94 |
36 |
|
T95 |
35 |
|
T96 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T94 |
39 |
|
T95 |
28 |
|
T96 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T94 |
36 |
|
T95 |
35 |
|
T96 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T94 |
39 |
|
T95 |
28 |
|
T96 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T94 |
36 |
|
T95 |
35 |
|
T96 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T94 |
38 |
|
T95 |
28 |
|
T96 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T94 |
11 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T94 |
36 |
|
T95 |
34 |
|
T96 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T94 |
36 |
|
T95 |
28 |
|
T96 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
10 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T94 |
34 |
|
T95 |
34 |
|
T96 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T94 |
35 |
|
T95 |
28 |
|
T96 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T94 |
10 |
|
T95 |
15 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T94 |
34 |
|
T95 |
34 |
|
T96 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
11 |
|
T95 |
17 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T94 |
34 |
|
T95 |
28 |
|
T96 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T94 |
10 |
|
T95 |
14 |
|
T96 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T94 |
33 |
|
T95 |
33 |
|
T96 |
40 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54439 |
1 |
|
|
T94 |
1498 |
|
T95 |
984 |
|
T96 |
1142 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44029 |
1 |
|
|
T94 |
727 |
|
T95 |
2000 |
|
T96 |
1410 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56747 |
1 |
|
|
T94 |
1713 |
|
T95 |
1136 |
|
T96 |
1782 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42215 |
1 |
|
|
T94 |
801 |
|
T95 |
962 |
|
T96 |
1276 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T94 |
31 |
|
T95 |
55 |
|
T96 |
65 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T94 |
29 |
|
T95 |
52 |
|
T96 |
63 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T94 |
31 |
|
T95 |
54 |
|
T96 |
64 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T94 |
29 |
|
T95 |
52 |
|
T96 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T94 |
30 |
|
T95 |
54 |
|
T96 |
62 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T94 |
28 |
|
T95 |
50 |
|
T96 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T94 |
29 |
|
T95 |
53 |
|
T96 |
62 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T94 |
28 |
|
T95 |
49 |
|
T96 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T94 |
29 |
|
T95 |
53 |
|
T96 |
61 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T94 |
27 |
|
T95 |
47 |
|
T96 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T94 |
29 |
|
T95 |
53 |
|
T96 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T94 |
27 |
|
T95 |
46 |
|
T96 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T94 |
27 |
|
T95 |
51 |
|
T96 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T94 |
26 |
|
T95 |
44 |
|
T96 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T94 |
27 |
|
T95 |
51 |
|
T96 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T94 |
24 |
|
T95 |
43 |
|
T96 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T94 |
26 |
|
T95 |
50 |
|
T96 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T94 |
22 |
|
T95 |
41 |
|
T96 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T94 |
26 |
|
T95 |
50 |
|
T96 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T94 |
21 |
|
T95 |
41 |
|
T96 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T94 |
26 |
|
T95 |
49 |
|
T96 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T94 |
21 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T94 |
25 |
|
T95 |
48 |
|
T96 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
19 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T94 |
19 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T94 |
24 |
|
T95 |
48 |
|
T96 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T94 |
19 |
|
T95 |
38 |
|
T96 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T94 |
24 |
|
T95 |
46 |
|
T96 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T94 |
19 |
|
T95 |
37 |
|
T96 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
16 |
|
T95 |
13 |
|
T96 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T94 |
24 |
|
T95 |
45 |
|
T96 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T94 |
19 |
|
T95 |
34 |
|
T96 |
41 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49604 |
1 |
|
|
T94 |
769 |
|
T95 |
1700 |
|
T96 |
1571 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44745 |
1 |
|
|
T94 |
1389 |
|
T95 |
1157 |
|
T96 |
1260 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56359 |
1 |
|
|
T94 |
1318 |
|
T95 |
1178 |
|
T96 |
1943 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46845 |
1 |
|
|
T94 |
993 |
|
T95 |
1207 |
|
T96 |
1044 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T94 |
39 |
|
T95 |
50 |
|
T96 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T94 |
39 |
|
T95 |
48 |
|
T96 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T94 |
39 |
|
T95 |
48 |
|
T96 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T94 |
39 |
|
T95 |
47 |
|
T96 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T94 |
38 |
|
T95 |
48 |
|
T96 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T94 |
38 |
|
T95 |
46 |
|
T96 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T94 |
35 |
|
T95 |
48 |
|
T96 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T94 |
36 |
|
T95 |
46 |
|
T96 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T94 |
33 |
|
T95 |
47 |
|
T96 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T94 |
36 |
|
T95 |
46 |
|
T96 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T94 |
32 |
|
T95 |
46 |
|
T96 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T94 |
36 |
|
T95 |
45 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T94 |
32 |
|
T95 |
46 |
|
T96 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T94 |
34 |
|
T95 |
44 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T94 |
31 |
|
T95 |
46 |
|
T96 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T94 |
34 |
|
T95 |
43 |
|
T96 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T94 |
31 |
|
T95 |
45 |
|
T96 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T94 |
33 |
|
T95 |
43 |
|
T96 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T94 |
31 |
|
T95 |
45 |
|
T96 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T94 |
19 |
|
T95 |
13 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T94 |
32 |
|
T95 |
42 |
|
T96 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T94 |
30 |
|
T95 |
44 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T94 |
19 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T94 |
32 |
|
T95 |
43 |
|
T96 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T94 |
28 |
|
T95 |
43 |
|
T96 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T94 |
19 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T94 |
32 |
|
T95 |
42 |
|
T96 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T94 |
27 |
|
T95 |
43 |
|
T96 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T94 |
18 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T94 |
32 |
|
T95 |
41 |
|
T96 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T94 |
27 |
|
T95 |
39 |
|
T96 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T94 |
18 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T94 |
31 |
|
T95 |
39 |
|
T96 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T94 |
19 |
|
T95 |
11 |
|
T96 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T94 |
25 |
|
T95 |
39 |
|
T96 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T94 |
18 |
|
T95 |
12 |
|
T96 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T94 |
29 |
|
T95 |
39 |
|
T96 |
31 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52274 |
1 |
|
|
T94 |
1031 |
|
T95 |
1131 |
|
T96 |
1674 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43879 |
1 |
|
|
T94 |
550 |
|
T95 |
1170 |
|
T96 |
762 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55645 |
1 |
|
|
T94 |
2296 |
|
T95 |
932 |
|
T96 |
2170 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45668 |
1 |
|
|
T94 |
747 |
|
T95 |
1853 |
|
T96 |
1207 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T94 |
33 |
|
T95 |
49 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T94 |
33 |
|
T95 |
50 |
|
T96 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T94 |
33 |
|
T95 |
49 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T94 |
33 |
|
T95 |
49 |
|
T96 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T94 |
32 |
|
T95 |
49 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T94 |
32 |
|
T95 |
49 |
|
T96 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T94 |
32 |
|
T95 |
48 |
|
T96 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T94 |
32 |
|
T95 |
49 |
|
T96 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T94 |
30 |
|
T95 |
47 |
|
T96 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T94 |
31 |
|
T95 |
45 |
|
T96 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T94 |
30 |
|
T95 |
45 |
|
T96 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T94 |
31 |
|
T95 |
42 |
|
T96 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T94 |
30 |
|
T95 |
43 |
|
T96 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T94 |
31 |
|
T95 |
41 |
|
T96 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T94 |
30 |
|
T95 |
43 |
|
T96 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
18 |
|
T95 |
19 |
|
T96 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
31 |
|
T95 |
39 |
|
T96 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T94 |
29 |
|
T95 |
43 |
|
T96 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T94 |
32 |
|
T95 |
37 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T94 |
29 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T94 |
30 |
|
T95 |
36 |
|
T96 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T94 |
28 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
17 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T94 |
28 |
|
T95 |
43 |
|
T96 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
17 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T94 |
28 |
|
T95 |
35 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T94 |
25 |
|
T95 |
42 |
|
T96 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
17 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T94 |
23 |
|
T95 |
41 |
|
T96 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
17 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T94 |
26 |
|
T95 |
34 |
|
T96 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T94 |
17 |
|
T95 |
19 |
|
T96 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T94 |
22 |
|
T95 |
41 |
|
T96 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T94 |
17 |
|
T95 |
18 |
|
T96 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T94 |
26 |
|
T95 |
33 |
|
T96 |
39 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58981 |
1 |
|
|
T94 |
1919 |
|
T95 |
1933 |
|
T96 |
1980 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40435 |
1 |
|
|
T94 |
499 |
|
T95 |
1043 |
|
T96 |
1294 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51721 |
1 |
|
|
T94 |
1497 |
|
T95 |
968 |
|
T96 |
1225 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47165 |
1 |
|
|
T94 |
836 |
|
T95 |
1092 |
|
T96 |
1263 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T94 |
26 |
|
T95 |
55 |
|
T96 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T94 |
28 |
|
T95 |
56 |
|
T96 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T94 |
26 |
|
T95 |
53 |
|
T96 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T94 |
27 |
|
T95 |
55 |
|
T96 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T94 |
25 |
|
T95 |
51 |
|
T96 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T94 |
27 |
|
T95 |
53 |
|
T96 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T94 |
25 |
|
T95 |
50 |
|
T96 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T94 |
27 |
|
T95 |
52 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T94 |
25 |
|
T95 |
49 |
|
T96 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T94 |
27 |
|
T95 |
51 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T94 |
22 |
|
T95 |
49 |
|
T96 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T94 |
27 |
|
T95 |
50 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T94 |
22 |
|
T95 |
47 |
|
T96 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T94 |
26 |
|
T95 |
48 |
|
T96 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T94 |
22 |
|
T95 |
43 |
|
T96 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T94 |
18 |
|
T95 |
16 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T94 |
24 |
|
T95 |
48 |
|
T96 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T94 |
22 |
|
T95 |
42 |
|
T96 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
17 |
|
T95 |
16 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T94 |
24 |
|
T95 |
48 |
|
T96 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T94 |
22 |
|
T95 |
42 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
17 |
|
T95 |
16 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T94 |
23 |
|
T95 |
46 |
|
T96 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T94 |
22 |
|
T95 |
42 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T94 |
23 |
|
T95 |
46 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T94 |
22 |
|
T95 |
39 |
|
T96 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T94 |
21 |
|
T95 |
45 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T94 |
22 |
|
T95 |
39 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T94 |
21 |
|
T95 |
43 |
|
T96 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T94 |
22 |
|
T95 |
38 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T94 |
21 |
|
T95 |
43 |
|
T96 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T94 |
20 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T94 |
22 |
|
T95 |
37 |
|
T96 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T94 |
17 |
|
T95 |
15 |
|
T96 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T94 |
20 |
|
T95 |
42 |
|
T96 |
39 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51828 |
1 |
|
|
T94 |
895 |
|
T95 |
1068 |
|
T96 |
1942 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41123 |
1 |
|
|
T94 |
805 |
|
T95 |
902 |
|
T96 |
772 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62783 |
1 |
|
|
T94 |
1873 |
|
T95 |
1973 |
|
T96 |
2314 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42816 |
1 |
|
|
T94 |
915 |
|
T95 |
1199 |
|
T96 |
788 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T94 |
43 |
|
T95 |
45 |
|
T96 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T94 |
45 |
|
T95 |
48 |
|
T96 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T94 |
42 |
|
T95 |
44 |
|
T96 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T94 |
45 |
|
T95 |
48 |
|
T96 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T94 |
40 |
|
T95 |
40 |
|
T96 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T94 |
44 |
|
T95 |
47 |
|
T96 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T94 |
40 |
|
T95 |
40 |
|
T96 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T94 |
44 |
|
T95 |
47 |
|
T96 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T94 |
40 |
|
T95 |
39 |
|
T96 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T94 |
42 |
|
T95 |
46 |
|
T96 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T94 |
40 |
|
T95 |
39 |
|
T96 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T94 |
42 |
|
T95 |
45 |
|
T96 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T94 |
35 |
|
T95 |
39 |
|
T96 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T94 |
41 |
|
T95 |
45 |
|
T96 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T94 |
34 |
|
T95 |
39 |
|
T96 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T94 |
13 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T94 |
41 |
|
T95 |
43 |
|
T96 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T94 |
32 |
|
T95 |
37 |
|
T96 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T94 |
12 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T94 |
42 |
|
T95 |
43 |
|
T96 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T94 |
31 |
|
T95 |
36 |
|
T96 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T94 |
12 |
|
T95 |
18 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T94 |
42 |
|
T95 |
43 |
|
T96 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T94 |
30 |
|
T95 |
36 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T94 |
42 |
|
T95 |
41 |
|
T96 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T94 |
30 |
|
T95 |
36 |
|
T96 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T94 |
40 |
|
T95 |
40 |
|
T96 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T94 |
27 |
|
T95 |
33 |
|
T96 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T94 |
37 |
|
T95 |
39 |
|
T96 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T94 |
14 |
|
T95 |
20 |
|
T96 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T94 |
27 |
|
T95 |
31 |
|
T96 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T94 |
36 |
|
T95 |
38 |
|
T96 |
34 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56353 |
1 |
|
|
T94 |
953 |
|
T95 |
2218 |
|
T96 |
1109 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40235 |
1 |
|
|
T94 |
1345 |
|
T95 |
957 |
|
T96 |
1098 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53020 |
1 |
|
|
T94 |
1353 |
|
T95 |
1110 |
|
T96 |
1644 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48191 |
1 |
|
|
T94 |
944 |
|
T95 |
884 |
|
T96 |
1776 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T94 |
40 |
|
T95 |
41 |
|
T96 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T94 |
38 |
|
T95 |
47 |
|
T96 |
61 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T94 |
38 |
|
T95 |
40 |
|
T96 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T94 |
38 |
|
T95 |
46 |
|
T96 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T94 |
37 |
|
T95 |
40 |
|
T96 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T94 |
38 |
|
T95 |
44 |
|
T96 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T94 |
35 |
|
T95 |
39 |
|
T96 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T94 |
32 |
|
T95 |
38 |
|
T96 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T94 |
31 |
|
T95 |
37 |
|
T96 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T94 |
30 |
|
T95 |
37 |
|
T96 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T94 |
38 |
|
T95 |
43 |
|
T96 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T94 |
30 |
|
T95 |
35 |
|
T96 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T94 |
15 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T94 |
37 |
|
T95 |
43 |
|
T96 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T94 |
29 |
|
T95 |
33 |
|
T96 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T94 |
38 |
|
T95 |
40 |
|
T96 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T94 |
29 |
|
T95 |
32 |
|
T96 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T94 |
27 |
|
T95 |
31 |
|
T96 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T94 |
38 |
|
T95 |
37 |
|
T96 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T94 |
25 |
|
T95 |
30 |
|
T96 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T94 |
38 |
|
T95 |
37 |
|
T96 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T94 |
24 |
|
T95 |
29 |
|
T96 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T94 |
37 |
|
T95 |
37 |
|
T96 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T94 |
24 |
|
T95 |
28 |
|
T96 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T94 |
14 |
|
T95 |
18 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T94 |
37 |
|
T95 |
35 |
|
T96 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
24 |
|
T96 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T94 |
23 |
|
T95 |
28 |
|
T96 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T94 |
14 |
|
T95 |
17 |
|
T96 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T94 |
36 |
|
T95 |
35 |
|
T96 |
42 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55311 |
1 |
|
|
T94 |
1051 |
|
T95 |
1520 |
|
T96 |
1170 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44913 |
1 |
|
|
T94 |
1561 |
|
T95 |
628 |
|
T96 |
1198 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58676 |
1 |
|
|
T94 |
1043 |
|
T95 |
2382 |
|
T96 |
1277 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38837 |
1 |
|
|
T94 |
860 |
|
T95 |
729 |
|
T96 |
1936 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T94 |
38 |
|
T95 |
35 |
|
T96 |
60 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T94 |
36 |
|
T95 |
29 |
|
T96 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T94 |
37 |
|
T95 |
34 |
|
T96 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T94 |
35 |
|
T95 |
29 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T94 |
36 |
|
T95 |
33 |
|
T96 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T94 |
34 |
|
T95 |
29 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T94 |
35 |
|
T95 |
33 |
|
T96 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T94 |
34 |
|
T95 |
27 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T94 |
34 |
|
T95 |
33 |
|
T96 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T94 |
32 |
|
T95 |
27 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T94 |
33 |
|
T95 |
32 |
|
T96 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T94 |
32 |
|
T95 |
32 |
|
T96 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T94 |
32 |
|
T95 |
32 |
|
T96 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T94 |
20 |
|
T95 |
31 |
|
T96 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T94 |
32 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
19 |
|
T95 |
31 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T94 |
31 |
|
T95 |
31 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
19 |
|
T95 |
31 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T94 |
32 |
|
T95 |
25 |
|
T96 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T94 |
29 |
|
T95 |
29 |
|
T96 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
19 |
|
T95 |
30 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T94 |
28 |
|
T95 |
25 |
|
T96 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T94 |
28 |
|
T95 |
29 |
|
T96 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
19 |
|
T95 |
30 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T94 |
28 |
|
T95 |
24 |
|
T96 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T94 |
28 |
|
T95 |
29 |
|
T96 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
19 |
|
T95 |
30 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T94 |
28 |
|
T95 |
23 |
|
T96 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T94 |
28 |
|
T95 |
28 |
|
T96 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
19 |
|
T95 |
30 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T94 |
27 |
|
T95 |
21 |
|
T96 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T94 |
18 |
|
T95 |
24 |
|
T96 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T94 |
28 |
|
T95 |
27 |
|
T96 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
19 |
|
T95 |
30 |
|
T96 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T94 |
26 |
|
T95 |
21 |
|
T96 |
47 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56008 |
1 |
|
|
T94 |
973 |
|
T95 |
1202 |
|
T96 |
2365 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46384 |
1 |
|
|
T94 |
876 |
|
T95 |
1300 |
|
T96 |
1106 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51761 |
1 |
|
|
T94 |
1167 |
|
T95 |
879 |
|
T96 |
1935 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43575 |
1 |
|
|
T94 |
1513 |
|
T95 |
1662 |
|
T96 |
581 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T94 |
38 |
|
T95 |
50 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T94 |
35 |
|
T95 |
50 |
|
T96 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T94 |
37 |
|
T95 |
47 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T94 |
35 |
|
T95 |
48 |
|
T96 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T94 |
37 |
|
T95 |
46 |
|
T96 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T94 |
34 |
|
T95 |
46 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T94 |
35 |
|
T95 |
46 |
|
T96 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T94 |
34 |
|
T95 |
45 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T94 |
34 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T94 |
34 |
|
T95 |
44 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T94 |
33 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T94 |
32 |
|
T95 |
44 |
|
T96 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T94 |
33 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T94 |
30 |
|
T95 |
42 |
|
T96 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T94 |
31 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T94 |
20 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T94 |
30 |
|
T95 |
41 |
|
T96 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T94 |
31 |
|
T95 |
40 |
|
T96 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T94 |
30 |
|
T95 |
40 |
|
T96 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T94 |
30 |
|
T95 |
38 |
|
T96 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T94 |
31 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T94 |
29 |
|
T95 |
35 |
|
T96 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T94 |
31 |
|
T95 |
42 |
|
T96 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T94 |
29 |
|
T95 |
34 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T94 |
31 |
|
T95 |
41 |
|
T96 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T94 |
19 |
|
T95 |
21 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T94 |
29 |
|
T95 |
32 |
|
T96 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
20 |
|
T96 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T94 |
31 |
|
T95 |
40 |
|
T96 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
19 |
|
T95 |
20 |
|
T96 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T94 |
28 |
|
T95 |
32 |
|
T96 |
24 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55565 |
1 |
|
|
T94 |
667 |
|
T95 |
966 |
|
T96 |
1420 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40820 |
1 |
|
|
T94 |
1279 |
|
T95 |
1694 |
|
T96 |
957 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60996 |
1 |
|
|
T94 |
1754 |
|
T95 |
1447 |
|
T96 |
1669 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40759 |
1 |
|
|
T94 |
732 |
|
T95 |
1150 |
|
T96 |
1751 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T94 |
48 |
|
T95 |
44 |
|
T96 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T94 |
41 |
|
T95 |
36 |
|
T96 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T94 |
48 |
|
T95 |
44 |
|
T96 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T94 |
41 |
|
T95 |
35 |
|
T96 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T94 |
48 |
|
T95 |
41 |
|
T96 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T94 |
40 |
|
T95 |
35 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T94 |
47 |
|
T95 |
41 |
|
T96 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T94 |
40 |
|
T95 |
35 |
|
T96 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T94 |
46 |
|
T95 |
41 |
|
T96 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T94 |
40 |
|
T95 |
34 |
|
T96 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T94 |
45 |
|
T95 |
41 |
|
T96 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T94 |
40 |
|
T95 |
34 |
|
T96 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T94 |
45 |
|
T95 |
40 |
|
T96 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T94 |
40 |
|
T95 |
34 |
|
T96 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T94 |
45 |
|
T95 |
39 |
|
T96 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T94 |
40 |
|
T95 |
33 |
|
T96 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T94 |
45 |
|
T95 |
38 |
|
T96 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T94 |
38 |
|
T95 |
33 |
|
T96 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T94 |
44 |
|
T95 |
36 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T94 |
37 |
|
T95 |
33 |
|
T96 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T94 |
44 |
|
T95 |
36 |
|
T96 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T94 |
36 |
|
T95 |
31 |
|
T96 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T94 |
44 |
|
T95 |
36 |
|
T96 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T94 |
34 |
|
T95 |
31 |
|
T96 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T94 |
43 |
|
T95 |
33 |
|
T96 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T94 |
33 |
|
T95 |
31 |
|
T96 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T94 |
41 |
|
T95 |
32 |
|
T96 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T94 |
31 |
|
T95 |
31 |
|
T96 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T94 |
8 |
|
T95 |
16 |
|
T96 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T94 |
40 |
|
T95 |
32 |
|
T96 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T94 |
16 |
|
T95 |
24 |
|
T96 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1083 |
1 |
|
|
T94 |
31 |
|
T95 |
31 |
|
T96 |
31 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50627 |
1 |
|
|
T94 |
856 |
|
T95 |
1034 |
|
T96 |
1559 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50148 |
1 |
|
|
T94 |
1830 |
|
T95 |
1187 |
|
T96 |
722 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51236 |
1 |
|
|
T94 |
820 |
|
T95 |
864 |
|
T96 |
2609 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45519 |
1 |
|
|
T94 |
867 |
|
T95 |
2020 |
|
T96 |
1003 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T94 |
49 |
|
T95 |
55 |
|
T96 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T94 |
50 |
|
T95 |
56 |
|
T96 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T94 |
49 |
|
T95 |
51 |
|
T96 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T94 |
48 |
|
T95 |
55 |
|
T96 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T94 |
49 |
|
T95 |
48 |
|
T96 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T94 |
47 |
|
T95 |
54 |
|
T96 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T94 |
48 |
|
T95 |
48 |
|
T96 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T94 |
47 |
|
T95 |
52 |
|
T96 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T94 |
47 |
|
T95 |
47 |
|
T96 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T94 |
45 |
|
T95 |
52 |
|
T96 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T94 |
46 |
|
T95 |
46 |
|
T96 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T94 |
42 |
|
T95 |
51 |
|
T96 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T94 |
46 |
|
T95 |
44 |
|
T96 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T94 |
40 |
|
T95 |
50 |
|
T96 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T94 |
45 |
|
T95 |
43 |
|
T96 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T94 |
40 |
|
T95 |
47 |
|
T96 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T94 |
43 |
|
T95 |
43 |
|
T96 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T94 |
40 |
|
T95 |
47 |
|
T96 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T94 |
42 |
|
T95 |
43 |
|
T96 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T94 |
12 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T94 |
40 |
|
T95 |
46 |
|
T96 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T94 |
40 |
|
T95 |
43 |
|
T96 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T94 |
12 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T94 |
38 |
|
T95 |
45 |
|
T96 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T94 |
40 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T94 |
12 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T94 |
38 |
|
T95 |
42 |
|
T96 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T94 |
39 |
|
T95 |
40 |
|
T96 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
12 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T94 |
37 |
|
T95 |
39 |
|
T96 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T94 |
12 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T94 |
35 |
|
T95 |
37 |
|
T96 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T94 |
13 |
|
T95 |
15 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T94 |
38 |
|
T95 |
39 |
|
T96 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T94 |
12 |
|
T95 |
14 |
|
T96 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T94 |
33 |
|
T95 |
36 |
|
T96 |
34 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55305 |
1 |
|
|
T94 |
1409 |
|
T95 |
1149 |
|
T96 |
2307 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43585 |
1 |
|
|
T94 |
827 |
|
T95 |
892 |
|
T96 |
1118 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57821 |
1 |
|
|
T94 |
2019 |
|
T95 |
2241 |
|
T96 |
1442 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41342 |
1 |
|
|
T94 |
515 |
|
T95 |
1158 |
|
T96 |
1068 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T94 |
34 |
|
T95 |
36 |
|
T96 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T94 |
28 |
|
T95 |
39 |
|
T96 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T94 |
34 |
|
T95 |
35 |
|
T96 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T94 |
28 |
|
T95 |
38 |
|
T96 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T94 |
33 |
|
T95 |
34 |
|
T96 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T94 |
27 |
|
T95 |
38 |
|
T96 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T94 |
33 |
|
T95 |
32 |
|
T96 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T94 |
25 |
|
T95 |
38 |
|
T96 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T94 |
33 |
|
T95 |
31 |
|
T96 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T94 |
24 |
|
T95 |
38 |
|
T96 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T94 |
33 |
|
T95 |
31 |
|
T96 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T94 |
22 |
|
T95 |
38 |
|
T96 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T94 |
33 |
|
T95 |
31 |
|
T96 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T94 |
21 |
|
T95 |
38 |
|
T96 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T94 |
32 |
|
T95 |
30 |
|
T96 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T94 |
19 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T94 |
21 |
|
T95 |
37 |
|
T96 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T94 |
32 |
|
T95 |
30 |
|
T96 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T94 |
21 |
|
T95 |
37 |
|
T96 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T94 |
32 |
|
T95 |
30 |
|
T96 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T94 |
18 |
|
T95 |
15 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T94 |
19 |
|
T95 |
37 |
|
T96 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T94 |
31 |
|
T95 |
28 |
|
T96 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T94 |
18 |
|
T95 |
38 |
|
T96 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T94 |
31 |
|
T95 |
27 |
|
T96 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T94 |
17 |
|
T95 |
38 |
|
T96 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T94 |
31 |
|
T95 |
26 |
|
T96 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T94 |
16 |
|
T95 |
36 |
|
T96 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T94 |
31 |
|
T95 |
26 |
|
T96 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T94 |
14 |
|
T95 |
36 |
|
T96 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T94 |
12 |
|
T95 |
17 |
|
T96 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T94 |
31 |
|
T95 |
25 |
|
T96 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T94 |
18 |
|
T95 |
14 |
|
T96 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1092 |
1 |
|
|
T94 |
14 |
|
T95 |
35 |
|
T96 |
27 |