Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7483083 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
286755 |
| auto[1] |
5314352 |
1 |
|
|
T33 |
272148 |
|
T19 |
47 |
|
T1 |
34 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12122007 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
523086 |
| auto[1] |
675428 |
1 |
|
|
T33 |
35817 |
|
T19 |
1 |
|
T12 |
1897 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7469644 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
280024 |
| auto[1] |
5327791 |
1 |
|
|
T33 |
278879 |
|
T19 |
41 |
|
T1 |
30 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2325600 |
1 |
|
|
T33 |
122221 |
|
T19 |
23 |
|
T1 |
11 |
| auto[1] |
auto[0] |
auto[1] |
337493 |
1 |
|
|
T33 |
17995 |
|
T12 |
974 |
|
T14 |
17 |
| auto[1] |
auto[1] |
auto[0] |
2326763 |
1 |
|
|
T33 |
120841 |
|
T19 |
17 |
|
T1 |
19 |
| auto[1] |
auto[1] |
auto[1] |
337935 |
1 |
|
|
T33 |
17822 |
|
T19 |
1 |
|
T12 |
923 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |