Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7469929 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
284675 |
| auto[1] |
5327506 |
1 |
|
|
T33 |
274228 |
|
T19 |
50 |
|
T1 |
14 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10622346 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
457296 |
| auto[1] |
2175089 |
1 |
|
|
T33 |
101607 |
|
T19 |
20 |
|
T1 |
14 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7507870 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
290114 |
| auto[1] |
5289565 |
1 |
|
|
T33 |
268789 |
|
T19 |
32 |
|
T1 |
26 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1565953 |
1 |
|
|
T33 |
87122 |
|
T19 |
2 |
|
T1 |
12 |
| auto[1] |
auto[0] |
auto[1] |
1095495 |
1 |
|
|
T33 |
52476 |
|
T19 |
13 |
|
T1 |
14 |
| auto[1] |
auto[1] |
auto[0] |
1548523 |
1 |
|
|
T33 |
80060 |
|
T19 |
10 |
|
T12 |
3125 |
| auto[1] |
auto[1] |
auto[1] |
1079594 |
1 |
|
|
T33 |
49131 |
|
T19 |
7 |
|
T12 |
4821 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |