Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7482226 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
288046 |
| auto[1] |
5315209 |
1 |
|
|
T33 |
270857 |
|
T19 |
40 |
|
T1 |
33 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10609589 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
456740 |
| auto[1] |
2187846 |
1 |
|
|
T33 |
102163 |
|
T19 |
21 |
|
T12 |
8665 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7457802 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
284631 |
| auto[1] |
5339633 |
1 |
|
|
T33 |
274272 |
|
T19 |
34 |
|
T1 |
4 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1598643 |
1 |
|
|
T33 |
88911 |
|
T19 |
7 |
|
T1 |
4 |
| auto[1] |
auto[0] |
auto[1] |
1106159 |
1 |
|
|
T33 |
52544 |
|
T19 |
10 |
|
T12 |
4141 |
| auto[1] |
auto[1] |
auto[0] |
1553144 |
1 |
|
|
T33 |
83198 |
|
T19 |
6 |
|
T12 |
3032 |
| auto[1] |
auto[1] |
auto[1] |
1081687 |
1 |
|
|
T33 |
49619 |
|
T19 |
11 |
|
T12 |
4524 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |