Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7460951 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
281896 |
| auto[1] |
5336484 |
1 |
|
|
T33 |
277007 |
|
T19 |
53 |
|
T1 |
33 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10603753 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
451868 |
| auto[1] |
2193682 |
1 |
|
|
T33 |
107035 |
|
T19 |
8 |
|
T1 |
6 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7435317 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
268730 |
| auto[1] |
5362118 |
1 |
|
|
T33 |
290173 |
|
T19 |
28 |
|
T1 |
15 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1586809 |
1 |
|
|
T33 |
93216 |
|
T19 |
9 |
|
T1 |
1 |
| auto[1] |
auto[0] |
auto[1] |
1097052 |
1 |
|
|
T33 |
54577 |
|
T19 |
7 |
|
T1 |
6 |
| auto[1] |
auto[1] |
auto[0] |
1581627 |
1 |
|
|
T33 |
89922 |
|
T19 |
11 |
|
T1 |
8 |
| auto[1] |
auto[1] |
auto[1] |
1096630 |
1 |
|
|
T33 |
52458 |
|
T19 |
1 |
|
T12 |
4273 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |