Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7476936 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
283198 |
auto[1] |
5320499 |
1 |
|
|
T33 |
275705 |
|
T19 |
54 |
|
T1 |
38 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
10611983 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
454094 |
auto[1] |
2185452 |
1 |
|
|
T33 |
104809 |
|
T19 |
12 |
|
T1 |
13 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470053 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
279868 |
auto[1] |
5327382 |
1 |
|
|
T33 |
279035 |
|
T19 |
23 |
|
T1 |
19 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1579808 |
1 |
|
|
T33 |
88660 |
|
T19 |
5 |
|
T1 |
2 |
auto[1] |
auto[0] |
auto[1] |
1098098 |
1 |
|
|
T33 |
53091 |
|
T19 |
8 |
|
T1 |
7 |
auto[1] |
auto[1] |
auto[0] |
1562122 |
1 |
|
|
T33 |
85566 |
|
T19 |
6 |
|
T1 |
4 |
auto[1] |
auto[1] |
auto[1] |
1087354 |
1 |
|
|
T33 |
51718 |
|
T19 |
4 |
|
T1 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |