Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7481869 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
282728 |
| auto[1] |
5315566 |
1 |
|
|
T33 |
276175 |
|
T19 |
40 |
|
T1 |
52 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10611473 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
455703 |
| auto[1] |
2185962 |
1 |
|
|
T33 |
103200 |
|
T19 |
18 |
|
T1 |
3 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7476078 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
284031 |
| auto[1] |
5321357 |
1 |
|
|
T33 |
274872 |
|
T19 |
34 |
|
T1 |
21 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1566378 |
1 |
|
|
T33 |
88230 |
|
T19 |
5 |
|
T1 |
9 |
| auto[1] |
auto[0] |
auto[1] |
1097397 |
1 |
|
|
T33 |
52705 |
|
T19 |
10 |
|
T12 |
5357 |
| auto[1] |
auto[1] |
auto[0] |
1569017 |
1 |
|
|
T33 |
83442 |
|
T19 |
11 |
|
T1 |
9 |
| auto[1] |
auto[1] |
auto[1] |
1088565 |
1 |
|
|
T33 |
50495 |
|
T19 |
8 |
|
T1 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |