Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7491806 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
283251 |
| auto[1] |
5305629 |
1 |
|
|
T33 |
275652 |
|
T19 |
50 |
|
T1 |
29 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10619937 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
455619 |
| auto[1] |
2177498 |
1 |
|
|
T33 |
103284 |
|
T19 |
16 |
|
T1 |
17 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7483352 |
1 |
|
|
T31 |
324 |
|
T32 |
15907 |
|
T33 |
280568 |
| auto[1] |
5314083 |
1 |
|
|
T33 |
278335 |
|
T19 |
31 |
|
T1 |
18 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1575154 |
1 |
|
|
T33 |
88433 |
|
T19 |
4 |
|
T1 |
1 |
| auto[1] |
auto[0] |
auto[1] |
1091688 |
1 |
|
|
T33 |
52041 |
|
T19 |
7 |
|
T1 |
17 |
| auto[1] |
auto[1] |
auto[0] |
1561431 |
1 |
|
|
T33 |
86618 |
|
T19 |
11 |
|
T12 |
2626 |
| auto[1] |
auto[1] |
auto[1] |
1085810 |
1 |
|
|
T33 |
51243 |
|
T19 |
9 |
|
T12 |
3924 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |