Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8399030 |
1 |
|
|
T22 |
338 |
|
T1 |
14726 |
|
T11 |
21924 |
auto[1] |
6310465 |
1 |
|
|
T1 |
11639 |
|
T11 |
19670 |
|
T13 |
69 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13899293 |
1 |
|
|
T22 |
338 |
|
T1 |
25049 |
|
T11 |
39028 |
auto[1] |
810202 |
1 |
|
|
T1 |
1316 |
|
T11 |
2566 |
|
T13 |
10 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8407887 |
1 |
|
|
T22 |
338 |
|
T1 |
14307 |
|
T11 |
21758 |
auto[1] |
6301608 |
1 |
|
|
T1 |
12058 |
|
T11 |
19836 |
|
T13 |
154 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2740248 |
1 |
|
|
T1 |
5366 |
|
T11 |
8052 |
|
T13 |
96 |
auto[1] |
auto[0] |
auto[1] |
402857 |
1 |
|
|
T1 |
678 |
|
T11 |
1153 |
|
T13 |
8 |
auto[1] |
auto[1] |
auto[0] |
2751158 |
1 |
|
|
T1 |
5376 |
|
T11 |
9218 |
|
T13 |
48 |
auto[1] |
auto[1] |
auto[1] |
407345 |
1 |
|
|
T1 |
638 |
|
T11 |
1413 |
|
T13 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |