Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8428971 |
1 |
|
|
T22 |
338 |
|
T1 |
15018 |
|
T11 |
22871 |
| auto[1] |
6280524 |
1 |
|
|
T1 |
11347 |
|
T11 |
18723 |
|
T13 |
110 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13902770 |
1 |
|
|
T22 |
338 |
|
T1 |
25074 |
|
T11 |
39149 |
| auto[1] |
806725 |
1 |
|
|
T1 |
1291 |
|
T11 |
2445 |
|
T13 |
6 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8435927 |
1 |
|
|
T22 |
338 |
|
T1 |
14130 |
|
T11 |
22525 |
| auto[1] |
6273568 |
1 |
|
|
T1 |
12235 |
|
T11 |
19069 |
|
T13 |
62 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2733243 |
1 |
|
|
T1 |
5847 |
|
T11 |
8241 |
|
T13 |
37 |
| auto[1] |
auto[0] |
auto[1] |
402850 |
1 |
|
|
T1 |
741 |
|
T11 |
1178 |
|
T13 |
4 |
| auto[1] |
auto[1] |
auto[0] |
2733600 |
1 |
|
|
T1 |
5097 |
|
T11 |
8383 |
|
T13 |
19 |
| auto[1] |
auto[1] |
auto[1] |
403875 |
1 |
|
|
T1 |
550 |
|
T11 |
1267 |
|
T13 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |