Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8413291 |
1 |
|
|
T22 |
338 |
|
T1 |
15081 |
|
T11 |
21759 |
| auto[1] |
6296204 |
1 |
|
|
T1 |
11284 |
|
T11 |
19835 |
|
T13 |
94 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13899143 |
1 |
|
|
T22 |
338 |
|
T1 |
25102 |
|
T11 |
39247 |
| auto[1] |
810352 |
1 |
|
|
T1 |
1263 |
|
T11 |
2347 |
|
T13 |
3 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8402113 |
1 |
|
|
T22 |
338 |
|
T1 |
14445 |
|
T11 |
23876 |
| auto[1] |
6307382 |
1 |
|
|
T1 |
11920 |
|
T11 |
17718 |
|
T13 |
75 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2755505 |
1 |
|
|
T1 |
5162 |
|
T11 |
7795 |
|
T13 |
52 |
| auto[1] |
auto[0] |
auto[1] |
407444 |
1 |
|
|
T1 |
594 |
|
T11 |
1225 |
|
T13 |
2 |
| auto[1] |
auto[1] |
auto[0] |
2741525 |
1 |
|
|
T1 |
5495 |
|
T11 |
7576 |
|
T13 |
20 |
| auto[1] |
auto[1] |
auto[1] |
402908 |
1 |
|
|
T1 |
669 |
|
T11 |
1122 |
|
T13 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |