Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8404405 |
1 |
|
|
T22 |
338 |
|
T1 |
14881 |
|
T11 |
21656 |
| auto[1] |
6305090 |
1 |
|
|
T1 |
11484 |
|
T11 |
19938 |
|
T13 |
162 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12150254 |
1 |
|
|
T22 |
338 |
|
T1 |
18467 |
|
T11 |
29823 |
| auto[1] |
2559241 |
1 |
|
|
T1 |
7898 |
|
T11 |
11771 |
|
T13 |
47 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8439003 |
1 |
|
|
T22 |
338 |
|
T1 |
14274 |
|
T11 |
22410 |
| auto[1] |
6270492 |
1 |
|
|
T1 |
12091 |
|
T11 |
19184 |
|
T13 |
95 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1854484 |
1 |
|
|
T1 |
2037 |
|
T11 |
3550 |
|
T13 |
21 |
| auto[1] |
auto[0] |
auto[1] |
1278832 |
1 |
|
|
T1 |
3990 |
|
T11 |
5903 |
|
T13 |
17 |
| auto[1] |
auto[1] |
auto[0] |
1856767 |
1 |
|
|
T1 |
2156 |
|
T11 |
3863 |
|
T13 |
27 |
| auto[1] |
auto[1] |
auto[1] |
1280409 |
1 |
|
|
T1 |
3908 |
|
T11 |
5868 |
|
T13 |
30 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |