Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2730427 |
1 |
|
|
T1 |
4834 |
|
T11 |
7353 |
|
T13 |
84 |
auto[1] |
auto[0] |
auto[1] |
401972 |
1 |
|
|
T1 |
626 |
|
T11 |
1052 |
|
T13 |
5 |
auto[1] |
auto[1] |
auto[0] |
2729575 |
1 |
|
|
T1 |
5161 |
|
T11 |
9274 |
|
T13 |
63 |
auto[1] |
auto[1] |
auto[1] |
401313 |
1 |
|
|
T1 |
647 |
|
T11 |
1377 |
|
T13 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |