Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8420779 |
1 |
|
|
T22 |
338 |
|
T1 |
14272 |
|
T11 |
22032 |
| auto[1] |
6288716 |
1 |
|
|
T1 |
12093 |
|
T11 |
19562 |
|
T13 |
82 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12155694 |
1 |
|
|
T22 |
338 |
|
T1 |
18680 |
|
T11 |
30042 |
| auto[1] |
2553801 |
1 |
|
|
T1 |
7685 |
|
T11 |
11552 |
|
T13 |
22 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8458600 |
1 |
|
|
T22 |
338 |
|
T1 |
14538 |
|
T11 |
23309 |
| auto[1] |
6250895 |
1 |
|
|
T1 |
11827 |
|
T11 |
18285 |
|
T13 |
72 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1861545 |
1 |
|
|
T1 |
1994 |
|
T11 |
3035 |
|
T13 |
28 |
| auto[1] |
auto[0] |
auto[1] |
1286879 |
1 |
|
|
T1 |
3852 |
|
T11 |
5088 |
|
T13 |
15 |
| auto[1] |
auto[1] |
auto[0] |
1835549 |
1 |
|
|
T1 |
2148 |
|
T11 |
3698 |
|
T13 |
22 |
| auto[1] |
auto[1] |
auto[1] |
1266922 |
1 |
|
|
T1 |
3833 |
|
T11 |
6464 |
|
T13 |
7 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |