Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8436453 |
1 |
|
|
T22 |
338 |
|
T1 |
13768 |
|
T11 |
21466 |
auto[1] |
6273042 |
1 |
|
|
T1 |
12597 |
|
T11 |
20128 |
|
T13 |
93 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12126135 |
1 |
|
|
T22 |
338 |
|
T1 |
18819 |
|
T11 |
29350 |
auto[1] |
2583360 |
1 |
|
|
T1 |
7546 |
|
T11 |
12244 |
|
T13 |
69 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8387574 |
1 |
|
|
T22 |
338 |
|
T1 |
14434 |
|
T11 |
21789 |
auto[1] |
6321921 |
1 |
|
|
T1 |
11931 |
|
T11 |
19805 |
|
T13 |
112 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1886907 |
1 |
|
|
T1 |
2052 |
|
T11 |
3474 |
|
T13 |
27 |
auto[1] |
auto[0] |
auto[1] |
1297605 |
1 |
|
|
T1 |
3503 |
|
T11 |
5059 |
|
T13 |
40 |
auto[1] |
auto[1] |
auto[0] |
1851654 |
1 |
|
|
T1 |
2333 |
|
T11 |
4087 |
|
T13 |
16 |
auto[1] |
auto[1] |
auto[1] |
1285755 |
1 |
|
|
T1 |
4043 |
|
T11 |
7185 |
|
T13 |
29 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |