Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8428642 |
1 |
|
|
T22 |
338 |
|
T1 |
15352 |
|
T11 |
24605 |
auto[1] |
6280853 |
1 |
|
|
T1 |
11013 |
|
T11 |
16989 |
|
T13 |
92 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12150361 |
1 |
|
|
T22 |
338 |
|
T1 |
18800 |
|
T11 |
29593 |
auto[1] |
2559134 |
1 |
|
|
T1 |
7565 |
|
T11 |
12001 |
|
T13 |
84 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8443864 |
1 |
|
|
T22 |
338 |
|
T1 |
14250 |
|
T11 |
22502 |
auto[1] |
6265631 |
1 |
|
|
T1 |
12115 |
|
T11 |
19092 |
|
T13 |
151 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1877547 |
1 |
|
|
T1 |
2447 |
|
T11 |
3952 |
|
T13 |
33 |
auto[1] |
auto[0] |
auto[1] |
1286926 |
1 |
|
|
T1 |
4094 |
|
T11 |
6639 |
|
T13 |
55 |
auto[1] |
auto[1] |
auto[0] |
1828950 |
1 |
|
|
T1 |
2103 |
|
T11 |
3139 |
|
T13 |
34 |
auto[1] |
auto[1] |
auto[1] |
1272208 |
1 |
|
|
T1 |
3471 |
|
T11 |
5362 |
|
T13 |
29 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |